2424#define NR_HW_IRQS 16
2525#define NR_MSI_VEC (IDX_PER_GROUP * IRQS_PER_IDX * NR_HW_IRQS)
2626
27- struct xgene_msi_group {
28- struct xgene_msi * msi ;
29- int gic_irq ;
30- u32 msi_grp ;
31- };
32-
3327struct xgene_msi {
3428 struct irq_domain * inner_domain ;
3529 u64 msi_addr ;
3630 void __iomem * msi_regs ;
3731 unsigned long * bitmap ;
3832 struct mutex bitmap_lock ;
39- struct xgene_msi_group * msi_groups ;
33+ unsigned int gic_irq [ NR_HW_IRQS ] ;
4034};
4135
4236/* Global data */
@@ -261,27 +255,20 @@ static int xgene_msi_init_allocator(struct device *dev)
261255
262256 mutex_init (& xgene_msi_ctrl -> bitmap_lock );
263257
264- xgene_msi_ctrl -> msi_groups = devm_kcalloc (dev , NR_HW_IRQS ,
265- sizeof (struct xgene_msi_group ),
266- GFP_KERNEL );
267- if (!xgene_msi_ctrl -> msi_groups )
268- return - ENOMEM ;
269-
270258 return 0 ;
271259}
272260
273261static void xgene_msi_isr (struct irq_desc * desc )
274262{
263+ unsigned int * irqp = irq_desc_get_handler_data (desc );
275264 struct irq_chip * chip = irq_desc_get_chip (desc );
276265 struct xgene_msi * xgene_msi = xgene_msi_ctrl ;
277- struct xgene_msi_group * msi_groups ;
278266 int msir_index , msir_val , hw_irq , ret ;
279267 u32 intr_index , grp_select , msi_grp ;
280268
281269 chained_irq_enter (chip , desc );
282270
283- msi_groups = irq_desc_get_handler_data (desc );
284- msi_grp = msi_groups -> msi_grp ;
271+ msi_grp = irqp - xgene_msi -> gic_irq ;
285272
286273 /*
287274 * MSIINTn (n is 0..F) indicates if there is a pending MSI interrupt
@@ -341,35 +328,31 @@ static void xgene_msi_remove(struct platform_device *pdev)
341328 cpuhp_remove_state (pci_xgene_online );
342329 cpuhp_remove_state (CPUHP_PCI_XGENE_DEAD );
343330
344- kfree (msi -> msi_groups );
345-
346331 xgene_free_domains (msi );
347332}
348333
349334static int xgene_msi_hwirq_alloc (unsigned int cpu )
350335{
351- struct xgene_msi * msi = xgene_msi_ctrl ;
352- struct xgene_msi_group * msi_group ;
353336 int i ;
354337 int err ;
355338
356339 for (i = cpu ; i < NR_HW_IRQS ; i += num_possible_cpus ()) {
357- msi_group = & msi -> msi_groups [i ];
340+ unsigned int irq = xgene_msi_ctrl -> gic_irq [i ];
358341
359342 /*
360343 * Statically allocate MSI GIC IRQs to each CPU core.
361344 * With 8-core X-Gene v1, 2 MSI GIC IRQs are allocated
362345 * to each core.
363346 */
364- irq_set_status_flags (msi_group -> gic_irq , IRQ_NO_BALANCING );
365- err = irq_set_affinity (msi_group -> gic_irq , cpumask_of (cpu ));
347+ irq_set_status_flags (irq , IRQ_NO_BALANCING );
348+ err = irq_set_affinity (irq , cpumask_of (cpu ));
366349 if (err ) {
367350 pr_err ("failed to set affinity for GIC IRQ" );
368351 return err ;
369352 }
370353
371- irq_set_chained_handler_and_data (msi_group -> gic_irq ,
372- xgene_msi_isr , msi_group );
354+ irq_set_chained_handler_and_data (irq , xgene_msi_isr ,
355+ & xgene_msi_ctrl -> gic_irq [ i ] );
373356 }
374357
375358 return 0 ;
@@ -378,14 +361,11 @@ static int xgene_msi_hwirq_alloc(unsigned int cpu)
378361static int xgene_msi_hwirq_free (unsigned int cpu )
379362{
380363 struct xgene_msi * msi = xgene_msi_ctrl ;
381- struct xgene_msi_group * msi_group ;
382364 int i ;
383365
384- for (i = cpu ; i < NR_HW_IRQS ; i += num_possible_cpus ()) {
385- msi_group = & msi -> msi_groups [i ];
386- irq_set_chained_handler_and_data (msi_group -> gic_irq , NULL ,
387- NULL );
388- }
366+ for (i = cpu ; i < NR_HW_IRQS ; i += num_possible_cpus ())
367+ irq_set_chained_handler_and_data (msi -> gic_irq [i ], NULL , NULL );
368+
389369 return 0 ;
390370}
391371
@@ -397,10 +377,9 @@ static const struct of_device_id xgene_msi_match_table[] = {
397377static int xgene_msi_probe (struct platform_device * pdev )
398378{
399379 struct resource * res ;
400- int rc , irq_index ;
401380 struct xgene_msi * xgene_msi ;
402- int virt_msir ;
403381 u32 msi_val , msi_idx ;
382+ int rc ;
404383
405384 xgene_msi_ctrl = devm_kzalloc (& pdev -> dev , sizeof (* xgene_msi_ctrl ),
406385 GFP_KERNEL );
@@ -430,23 +409,20 @@ static int xgene_msi_probe(struct platform_device *pdev)
430409 goto error ;
431410 }
432411
433- for (irq_index = 0 ; irq_index < NR_HW_IRQS ; irq_index ++ ) {
434- virt_msir = platform_get_irq (pdev , irq_index );
435- if (virt_msir < 0 ) {
436- rc = virt_msir ;
412+ for (int irq_index = 0 ; irq_index < NR_HW_IRQS ; irq_index ++ ) {
413+ rc = platform_get_irq (pdev , irq_index );
414+ if (rc < 0 )
437415 goto error ;
438- }
439- xgene_msi -> msi_groups [irq_index ].gic_irq = virt_msir ;
440- xgene_msi -> msi_groups [irq_index ].msi_grp = irq_index ;
441- xgene_msi -> msi_groups [irq_index ].msi = xgene_msi ;
416+
417+ xgene_msi -> gic_irq [irq_index ] = rc ;
442418 }
443419
444420 /*
445421 * MSInIRx registers are read-to-clear; before registering
446422 * interrupt handlers, read all of them to clear spurious
447423 * interrupts that may occur before the driver is probed.
448424 */
449- for (irq_index = 0 ; irq_index < NR_HW_IRQS ; irq_index ++ ) {
425+ for (int irq_index = 0 ; irq_index < NR_HW_IRQS ; irq_index ++ ) {
450426 for (msi_idx = 0 ; msi_idx < IDX_PER_GROUP ; msi_idx ++ )
451427 xgene_msi_ir_read (xgene_msi , irq_index , msi_idx );
452428
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