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Merge branch '20250903-msm8937-v9-1-a097c91c5801@mainlining.org' into clk-for-6.18
Merge the MSM8937 global clock controller binding through a topic branch to allow merging the constants into the DeviceTree branch as well.
2 parents 9524f95 + 4d32c1f commit 154691e

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Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml

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@@ -9,16 +9,21 @@ title: Qualcomm Global Clock & Reset Controller on MSM8953
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maintainers:
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- Adam Skladowski <a_skl39@protonmail.com>
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- Sireesh Kodali <sireeshkodali@protonmail.com>
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- Barnabas Czeman <barnabas.czeman@mainlining.org>
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description: |
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Qualcomm global clock control module provides the clocks, resets and power
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domains on MSM8953.
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domains on MSM8937 or MSM8953.
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See also: include/dt-bindings/clock/qcom,gcc-msm8953.h
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See also::
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include/dt-bindings/clock/qcom,gcc-msm8917.h
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include/dt-bindings/clock/qcom,gcc-msm8953.h
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properties:
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compatible:
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const: qcom,gcc-msm8953
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enum:
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- qcom,gcc-msm8937
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- qcom,gcc-msm8953
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clocks:
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items:

include/dt-bindings/clock/qcom,gcc-msm8917.h

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#define VFE1_CLK_SRC 163
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#define VSYNC_CLK_SRC 164
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#define GPLL0_SLEEP_CLK_SRC 165
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/* Addtional MSM8937-specific clocks */
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#define MSM8937_BLSP1_QUP1_I2C_APPS_CLK_SRC 166
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#define MSM8937_BLSP1_QUP1_SPI_APPS_CLK_SRC 167
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#define MSM8937_BLSP2_QUP4_I2C_APPS_CLK_SRC 168
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#define MSM8937_BLSP2_QUP4_SPI_APPS_CLK_SRC 169
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#define MSM8937_BYTE1_CLK_SRC 170
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#define MSM8937_ESC1_CLK_SRC 171
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#define MSM8937_PCLK1_CLK_SRC 172
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#define MSM8937_GCC_BLSP1_QUP1_I2C_APPS_CLK 173
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#define MSM8937_GCC_BLSP1_QUP1_SPI_APPS_CLK 174
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#define MSM8937_GCC_BLSP2_QUP4_I2C_APPS_CLK 175
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#define MSM8937_GCC_BLSP2_QUP4_SPI_APPS_CLK 176
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#define MSM8937_GCC_MDSS_BYTE1_CLK 177
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#define MSM8937_GCC_MDSS_ESC1_CLK 178
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#define MSM8937_GCC_MDSS_PCLK1_CLK 179
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#define MSM8937_GCC_OXILI_AON_CLK 180
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#define MSM8937_GCC_OXILI_TIMER_CLK 181
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/* GCC block resets */
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#define GCC_CAMSS_MICRO_BCR 0
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#define VENUS_GDSC 5
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#define VFE0_GDSC 6
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#define VFE1_GDSC 7
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/* Additional MSM8937-specific GDSCs */
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#define MSM8937_OXILI_CX_GDSC 8
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#endif

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