@@ -342,7 +342,6 @@ static const struct xe_device_desc lnl_desc = {
342342 .has_display = true,
343343 .has_flat_ccs = 1 ,
344344 .has_pxp = true,
345- .has_mem_copy_instr = true,
346345 .max_gt_per_tile = 2 ,
347346 .needs_scratch = true,
348347 .va_bits = 48 ,
@@ -363,7 +362,6 @@ static const struct xe_device_desc bmg_desc = {
363362 .has_heci_cscfi = 1 ,
364363 .has_late_bind = true,
365364 .has_sriov = true,
366- .has_mem_copy_instr = true,
367365 .max_gt_per_tile = 2 ,
368366 .needs_scratch = true,
369367 .subplatforms = (const struct xe_subplatform_desc []) {
@@ -380,7 +378,6 @@ static const struct xe_device_desc ptl_desc = {
380378 .has_display = true,
381379 .has_flat_ccs = 1 ,
382380 .has_sriov = true,
383- .has_mem_copy_instr = true,
384381 .max_gt_per_tile = 2 ,
385382 .needs_scratch = true,
386383 .needs_shared_vf_gt_wq = true,
@@ -393,7 +390,6 @@ static const struct xe_device_desc nvls_desc = {
393390 .dma_mask_size = 46 ,
394391 .has_display = true,
395392 .has_flat_ccs = 1 ,
396- .has_mem_copy_instr = true,
397393 .max_gt_per_tile = 2 ,
398394 .require_force_probe = true,
399395 .va_bits = 48 ,
@@ -675,7 +671,6 @@ static int xe_info_init_early(struct xe_device *xe,
675671 xe -> info .has_pxp = desc -> has_pxp ;
676672 xe -> info .has_sriov = xe_configfs_primary_gt_allowed (to_pci_dev (xe -> drm .dev )) &&
677673 desc -> has_sriov ;
678- xe -> info .has_mem_copy_instr = desc -> has_mem_copy_instr ;
679674 xe -> info .skip_guc_pc = desc -> skip_guc_pc ;
680675 xe -> info .skip_mtcfg = desc -> skip_mtcfg ;
681676 xe -> info .skip_pcode = desc -> skip_pcode ;
@@ -864,6 +859,7 @@ static int xe_info_init(struct xe_device *xe,
864859 xe -> info .has_range_tlb_inval = graphics_desc -> has_range_tlb_inval ;
865860 xe -> info .has_usm = graphics_desc -> has_usm ;
866861 xe -> info .has_64bit_timestamp = graphics_desc -> has_64bit_timestamp ;
862+ xe -> info .has_mem_copy_instr = GRAPHICS_VER (xe ) >= 20 ;
867863
868864 xe_info_probe_tile_count (xe );
869865
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