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Merge tag 'at91-soc-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/arm
Microchip arm-soc updates for v6.18 This update includes: - low priority fixes to the PM code, in relation to recent addition of sam9x75 or sama7d65 SoCs - removal of the 2.5V regulator for low power modes since this is no longer supported * tag 'at91-soc-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: pm: Remove 2.5V regulator ARM: at91: pm: save and restore ACR during PLL disable/enable ARM: at91: pm: fix MCKx restore routine ARM: at91: pm: fix .uhp_udp_mask specification for current SoCs Link: https://lore.kernel.org/r/20250916150328.27015-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 9685b29 + 7474367 commit 1cdfe53

3 files changed

Lines changed: 10 additions & 40 deletions

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arch/arm/mach-at91/pm.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1364,7 +1364,7 @@ static const struct pmc_info pmc_infos[] __initconst = {
13641364
.version = AT91_PMC_V1,
13651365
},
13661366
{
1367-
.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP,
1367+
.uhp_udp_mask = AT91SAM926x_PMC_UHP,
13681368
.mckr = 0x28,
13691369
.version = AT91_PMC_V2,
13701370
},

arch/arm/mach-at91/pm_suspend.S

Lines changed: 9 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -87,29 +87,6 @@ tmp3 .req r6
8787

8888
.endm
8989

90-
/**
91-
* Set state for 2.5V low power regulator
92-
* @ena: 0 - disable regulator
93-
* 1 - enable regulator
94-
*
95-
* Side effects: overwrites r7, r8, r9, r10
96-
*/
97-
.macro at91_2_5V_reg_set_low_power ena
98-
#ifdef CONFIG_SOC_SAMA7
99-
ldr r7, .sfrbu
100-
mov r8, #\ena
101-
ldr r9, [r7, #AT91_SFRBU_25LDOCR]
102-
orr r9, r9, #AT91_SFRBU_25LDOCR_LP
103-
cmp r8, #1
104-
beq lp_done_\ena
105-
bic r9, r9, #AT91_SFRBU_25LDOCR_LP
106-
lp_done_\ena:
107-
ldr r10, =AT91_SFRBU_25LDOCR_LDOANAKEY
108-
orr r9, r9, r10
109-
str r9, [r7, #AT91_SFRBU_25LDOCR]
110-
#endif
111-
.endm
112-
11390
.macro at91_backup_set_lpm reg
11491
#ifdef CONFIG_SOC_SAMA7
11592
orr \reg, \reg, #0x200000
@@ -689,6 +666,10 @@ sr_dis_exit:
689666
bic tmp2, tmp2, #AT91_PMC_PLL_UPDT_ID
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str tmp2, [pmc, #AT91_PMC_PLL_UPDT]
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669+
/* save acr */
670+
ldr tmp2, [pmc, #AT91_PMC_PLL_ACR]
671+
str tmp2, .saved_acr
672+
692673
/* save div. */
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mov tmp1, #0
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ldr tmp2, [pmc, #AT91_PMC_PLL_CTRL0]
@@ -758,7 +739,7 @@ sr_dis_exit:
758739
str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
759740

760741
/* step 2. */
761-
ldr tmp1, =AT91_PMC_PLL_ACR_DEFAULT_PLLA
742+
ldr tmp1, .saved_acr
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str tmp1, [pmc, #AT91_PMC_PLL_ACR]
763744

764745
/* step 3. */
@@ -904,7 +885,7 @@ e_done:
904885
/**
905886
* at91_mckx_ps_restore: restore MCKx settings
906887
*
907-
* Side effects: overwrites tmp1, tmp2
888+
* Side effects: overwrites tmp1, tmp2 and tmp3
908889
*/
909890
.macro at91_mckx_ps_restore
910891
#ifdef CONFIG_SOC_SAMA7
@@ -980,7 +961,7 @@ r_ps:
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bic tmp3, tmp3, #AT91_PMC_MCR_V2_ID_MSK
981962
orr tmp3, tmp3, tmp1
982963
orr tmp3, tmp3, #AT91_PMC_MCR_V2_CMD
983-
str tmp2, [pmc, #AT91_PMC_MCR_V2]
964+
str tmp3, [pmc, #AT91_PMC_MCR_V2]
984965

985966
wait_mckrdy tmp1
986967

@@ -1019,9 +1000,6 @@ save_mck:
10191000

10201001
at91_plla_disable
10211002

1022-
/* Enable low power mode for 2.5V regulator. */
1023-
at91_2_5V_reg_set_low_power 1
1024-
10251003
ldr tmp3, .pm_mode
10261004
cmp tmp3, #AT91_PM_ULP1
10271005
beq ulp1_mode
@@ -1034,9 +1012,6 @@ ulp1_mode:
10341012
b ulp_exit
10351013

10361014
ulp_exit:
1037-
/* Disable low power mode for 2.5V regulator. */
1038-
at91_2_5V_reg_set_low_power 0
1039-
10401015
ldr pmc, .pmc_base
10411016

10421017
at91_plla_enable
@@ -1207,6 +1182,8 @@ ENDPROC(at91_pm_suspend_in_sram)
12071182
#endif
12081183
.saved_mckr:
12091184
.word 0
1185+
.saved_acr:
1186+
.word 0
12101187
.saved_pllar:
12111188
.word 0
12121189
.saved_sam9_lpr:

include/soc/at91/sama7-sfrbu.h

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -18,13 +18,6 @@
1818
#define AT91_SFRBU_PSWBU_SOFTSWITCH (1 << 1) /* Power switch BU source selection */
1919
#define AT91_SFRBU_PSWBU_CTRL (1 << 0) /* Power switch BU control */
2020

21-
#define AT91_SFRBU_25LDOCR (0x0C) /* SFRBU 2.5V LDO Control Register */
22-
#define AT91_SFRBU_25LDOCR_LDOANAKEY (0x3B6E18 << 8) /* Specific value mandatory to allow writing of other register bits. */
23-
#define AT91_SFRBU_25LDOCR_STATE (1 << 3) /* LDOANA Switch On/Off Control */
24-
#define AT91_SFRBU_25LDOCR_LP (1 << 2) /* LDOANA Low-Power Mode Control */
25-
#define AT91_SFRBU_PD_VALUE_MSK (0x3)
26-
#define AT91_SFRBU_25LDOCR_PD_VALUE(v) ((v) & AT91_SFRBU_PD_VALUE_MSK) /* LDOANA Pull-down value */
27-
2821
#define AT91_FRBU_DDRPWR (0x10) /* SFRBU DDR Power Control Register */
2922
#define AT91_FRBU_DDRPWR_STATE (1 << 0) /* DDR Power Mode State */
3023

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