Skip to content

Commit 221e6e9

Browse files
jannaujannau
committed
Merge branch 'bits/170-atcphy' into asahi-wip
2 parents 8bc119a + 36eef98 commit 221e6e9

File tree

9 files changed

+3259
-0
lines changed

9 files changed

+3259
-0
lines changed

‎Documentation/devicetree/bindings/phy/apple,atcphy.yaml‎

Lines changed: 222 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,222 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/phy/apple,atcphy.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Apple Type-C PHY (ATCPHY)
8+
9+
maintainers:
10+
- Sven Peter <sven@kernel.org>
11+
12+
description: >
13+
The Apple Type-C PHY (ATCPHY) is a combined PHY for USB 2.0, USB 3.x,
14+
USB4/Thunderbolt, and DisplayPort connectivity via Type-C ports found in
15+
Apple Silicon SoCs.
16+
17+
The PHY handles muxing between these different protocols and also provides the
18+
reset controller for the attached DWC3 USB controller.
19+
20+
It is designed for USB4 operation and does not handle individual differential
21+
pairs as distinct DisplayPort lanes. Any reference to lane in this binding
22+
hence refers to two differential pairs (RX and TX) as used in USB terminology.
23+
24+
In order to correctly setup these lanes for the various modes calibration
25+
values copied from Apple's firmware and converted to the format described
26+
below by our bootloader m1n1 are required. Without these only USB2 operation
27+
is possible.
28+
29+
allOf:
30+
- $ref: /schemas/usb/usb-switch.yaml#
31+
32+
$defs:
33+
apple,tunable:
34+
$ref: /schemas/types.yaml#/definitions/uint32-matrix
35+
items:
36+
items:
37+
- description: Register offset
38+
- description: Mask to be applied to the register value
39+
- description: Bits to be set after applying the mask
40+
description: >
41+
List of (register offset, mask, value) tuples copied from Apple's Device
42+
Tree by our bootloader m1n1 and used to configure the PHY. These values
43+
even vary for a single product/device and likely contain calibration
44+
values determined by Apple at manufacturing time.
45+
Unless otherwise noted these tunables are always applied to the core
46+
register region.
47+
48+
properties:
49+
compatible:
50+
oneOf:
51+
- items:
52+
- enum:
53+
- apple,t6000-atcphy
54+
- apple,t6020-atcphy
55+
- apple,t8112-atcphy
56+
- const: apple,t8103-atcphy
57+
- const: apple,t8103-atcphy
58+
59+
reg:
60+
items:
61+
- description: Common controls for all PHYs (USB2/3/4, DisplayPort, TBT)
62+
- description: DisplayPort Alternate Mode PHY specific controls
63+
- description: Type-C PHY AXI to Apple Fabric interconnect controls
64+
- description: USB2 PHY specific controls
65+
- description: USB3 PIPE interface controls
66+
67+
reg-names:
68+
items:
69+
- const: core
70+
- const: lpdptx
71+
- const: axi2af
72+
- const: usb2phy
73+
- const: pipehandler
74+
75+
"#phy-cells":
76+
const: 1
77+
78+
"#reset-cells":
79+
const: 0
80+
81+
mode-switch: true
82+
orientation-switch: true
83+
84+
power-domains:
85+
maxItems: 1
86+
87+
ports:
88+
$ref: /schemas/graph.yaml#/properties/ports
89+
properties:
90+
port@0:
91+
$ref: /schemas/graph.yaml#/properties/port
92+
description: Outgoing connection to the SS port of the Type-C connector.
93+
94+
port@1:
95+
$ref: /schemas/graph.yaml#/properties/port
96+
description: Incoming endpoint from the USB3 controller.
97+
98+
port@2:
99+
$ref: /schemas/graph.yaml#/properties/port
100+
description: Incoming endpoint from the DisplayPort controller.
101+
102+
port@3:
103+
$ref: /schemas/graph.yaml#/properties/port
104+
description: Incoming endpoint from the USB4/Thunderbolt controller.
105+
106+
apple,tunable-common-a:
107+
$ref: "#/$defs/apple,tunable"
108+
description: >
109+
Common tunables required for all modes, applied before tunable-axi2af.
110+
111+
apple,tunable-axi2af:
112+
$ref: "#/$defs/apple,tunable"
113+
description: >
114+
AXI to Apple Fabric tunables, required for all modes. Unlike all other
115+
tunables these are applied to the axi2af region.
116+
117+
apple,tunable-common-b:
118+
$ref: "#/$defs/apple,tunable"
119+
description: >
120+
Common tunables required for all modes, applied after tunable-axi2af.
121+
122+
apple,tunable-lane0-usb:
123+
$ref: "#/$defs/apple,tunable"
124+
description: USB3 tunables for lane 0.
125+
126+
apple,tunable-lane1-usb:
127+
$ref: "#/$defs/apple,tunable"
128+
description: USB3 tunables for lane 1.
129+
130+
apple,tunable-lane0-cio:
131+
$ref: "#/$defs/apple,tunable"
132+
description: USB4/Thunderbolt ("Converged IO") tunables for lane 0.
133+
134+
apple,tunable-lane1-cio:
135+
$ref: "#/$defs/apple,tunable"
136+
description: USB4/Thunderbolt ("Converged IO") tunables for lane 1.
137+
138+
apple,tunable-lane0-dp:
139+
$ref: "#/$defs/apple,tunable"
140+
description: >
141+
DisplayPort tunables for lane 0.
142+
143+
Note that lane here refers to a USB RX and TX pair re-used for DisplayPort
144+
and not to an individual DisplayPort differential lane.
145+
146+
apple,tunable-lane1-dp:
147+
$ref: "#/$defs/apple,tunable"
148+
description: >
149+
DisplayPort tunables for lane 1.
150+
151+
Note that lane here refers to a USB RX and TX pair re-used for DisplayPort
152+
and not to an individual DisplayPort differential lane.
153+
154+
required:
155+
- compatible
156+
- reg
157+
- reg-names
158+
- "#phy-cells"
159+
- "#reset-cells"
160+
- orientation-switch
161+
- mode-switch
162+
- power-domains
163+
- ports
164+
165+
additionalProperties: false
166+
167+
examples:
168+
- |
169+
phy@83000000 {
170+
compatible = "apple,t8103-atcphy";
171+
reg = <0x83000000 0x4c000>,
172+
<0x83050000 0x8000>,
173+
<0x80000000 0x4000>,
174+
<0x82a90000 0x4000>,
175+
<0x82a84000 0x4000>;
176+
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
177+
"pipehandler";
178+
179+
#phy-cells = <1>;
180+
#reset-cells = <0>;
181+
182+
orientation-switch;
183+
mode-switch;
184+
power-domains = <&ps_atc0_usb>;
185+
186+
ports {
187+
#address-cells = <1>;
188+
#size-cells = <0>;
189+
190+
port@0 {
191+
reg = <0>;
192+
193+
endpoint {
194+
remote-endpoint = <&typec_connector_ss>;
195+
};
196+
};
197+
198+
port@1 {
199+
reg = <1>;
200+
201+
endpoint {
202+
remote-endpoint = <&dwc3_ss_out>;
203+
};
204+
};
205+
206+
port@2 {
207+
reg = <2>;
208+
209+
endpoint {
210+
remote-endpoint = <&dcp_dp_out>;
211+
};
212+
};
213+
214+
port@3 {
215+
reg = <3>;
216+
217+
endpoint {
218+
remote-endpoint = <&acio_tbt_out>;
219+
};
220+
};
221+
};
222+
};

‎MAINTAINERS‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2437,6 +2437,7 @@ F: Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml
24372437
F: Documentation/devicetree/bindings/nvmem/apple,efuses.yaml
24382438
F: Documentation/devicetree/bindings/nvmem/apple,spmi-nvmem.yaml
24392439
F: Documentation/devicetree/bindings/pci/apple,pcie.yaml
2440+
F: Documentation/devicetree/bindings/phy/apple,atcphy.yaml
24402441
F: Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
24412442
F: Documentation/devicetree/bindings/power/apple*
24422443
F: Documentation/devicetree/bindings/power/reset/apple,smc-reboot.yaml
@@ -2466,6 +2467,7 @@ F: drivers/mfd/macsmc.c
24662467
F: drivers/nvme/host/apple.c
24672468
F: drivers/nvmem/apple-efuses.c
24682469
F: drivers/nvmem/apple-spmi-nvmem.c
2470+
F: drivers/phy/apple/
24692471
F: drivers/pinctrl/pinctrl-apple-gpio.c
24702472
F: drivers/power/reset/macsmc-reboot.c
24712473
F: drivers/pwm/pwm-apple.c

‎drivers/phy/Kconfig‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -103,6 +103,7 @@ config PHY_NXP_PTN3222
103103

104104
source "drivers/phy/allwinner/Kconfig"
105105
source "drivers/phy/amlogic/Kconfig"
106+
source "drivers/phy/apple/Kconfig"
106107
source "drivers/phy/broadcom/Kconfig"
107108
source "drivers/phy/cadence/Kconfig"
108109
source "drivers/phy/freescale/Kconfig"

‎drivers/phy/Makefile‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@ obj-$(CONFIG_PHY_AIROHA_PCIE) += phy-airoha-pcie.o
1515
obj-$(CONFIG_PHY_NXP_PTN3222) += phy-nxp-ptn3222.o
1616
obj-y += allwinner/ \
1717
amlogic/ \
18+
apple/ \
1819
broadcom/ \
1920
cadence/ \
2021
freescale/ \

‎drivers/phy/apple/Kconfig‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,23 @@
1+
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2+
config PHY_APPLE_ATC
3+
tristate "Apple Type-C PHY"
4+
depends on (ARM64 && ARCH_APPLE) || (COMPILE_TEST && !GENERIC_ATOMIC64)
5+
depends on TYPEC
6+
select GENERIC_PHY
7+
select APPLE_TUNABLE
8+
help
9+
Enable this to add support for the Apple Type-C PHY found in
10+
Apple Silicon M-series SoCs. This PHY supports USB2,
11+
USB3, USB4, Thunderbolt, and DisplayPort.
12+
13+
If M is selected the module will be called 'phy-apple-atc'.
14+
15+
config PHY_APPLE_DPTX
16+
tristate "Apple DPTX PHY"
17+
depends on ARCH_APPLE || COMPILE_TEST
18+
select GENERIC_PHY
19+
help
20+
Enable this to add support for the Apple DPTX PHY found on Apple SoCs
21+
such as the M2.
22+
This driver provides support for DisplayPort and is used on the
23+
Mac mini (M2 and M2 Pro, 2023).

‎drivers/phy/apple/Makefile‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,7 @@
1+
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2+
3+
obj-$(CONFIG_PHY_APPLE_ATC) += phy-apple-atc.o
4+
phy-apple-atc-y := atc.o
5+
6+
obj-$(CONFIG_PHY_APPLE_DPTX) += phy-apple-dptx.o
7+
phy-apple-dptx-y += dptx.o

0 commit comments

Comments
 (0)