drm/ast: Gen7: Disable VGASR0[1] as on Gen4+

Set VGACRB6[5], which disables asynchronous sequencer resets via
VGASR0[1]. This was most likely an oversight when adding support
for Gen7. Aligns Gen7 with the earlier Gen4+.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://lore.kernel.org/r/20250706162816.211552-10-tzimmermann@suse.de

Author: tdz

drivers/gpu/drm/ast/ast_2600.c

@@ -60,6 +60,7 @@ void ast_2600_set_def_ext_reg(struct ast_device *ast)
 
 	/* Enable RAMDAC for A1 */
 	reg = 0x04;
+	reg |= 0x20;
 	ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xff, reg);
 }