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| 1 | +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/remoteproc/qcom,milos-pas.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Qualcomm Milos SoC Peripheral Authentication Service |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Luca Weiss <luca.weiss@fairphone.com> |
| 11 | + |
| 12 | +description: |
| 13 | + Qualcomm Milos SoC Peripheral Authentication Service loads and boots firmware |
| 14 | + on the Qualcomm DSP Hexagon cores. |
| 15 | + |
| 16 | +properties: |
| 17 | + compatible: |
| 18 | + enum: |
| 19 | + - qcom,milos-adsp-pas |
| 20 | + - qcom,milos-cdsp-pas |
| 21 | + - qcom,milos-mpss-pas |
| 22 | + - qcom,milos-wpss-pas |
| 23 | + |
| 24 | + reg: |
| 25 | + maxItems: 1 |
| 26 | + |
| 27 | + clocks: |
| 28 | + items: |
| 29 | + - description: XO clock |
| 30 | + |
| 31 | + clock-names: |
| 32 | + items: |
| 33 | + - const: xo |
| 34 | + |
| 35 | + interrupts: |
| 36 | + minItems: 6 |
| 37 | + maxItems: 6 |
| 38 | + |
| 39 | + interrupt-names: |
| 40 | + minItems: 6 |
| 41 | + maxItems: 6 |
| 42 | + |
| 43 | + qcom,qmp: |
| 44 | + $ref: /schemas/types.yaml#/definitions/phandle |
| 45 | + description: Reference to the AOSS side-channel message RAM. |
| 46 | + |
| 47 | + smd-edge: false |
| 48 | + |
| 49 | + firmware-name: |
| 50 | + minItems: 1 |
| 51 | + items: |
| 52 | + - description: Firmware name of the Hexagon core |
| 53 | + - description: Firmware name of the Hexagon Devicetree |
| 54 | + |
| 55 | + memory-region: |
| 56 | + minItems: 1 |
| 57 | + items: |
| 58 | + - description: Memory region for core Firmware authentication |
| 59 | + - description: Memory region for Devicetree Firmware authentication |
| 60 | + |
| 61 | +required: |
| 62 | + - compatible |
| 63 | + - reg |
| 64 | + - memory-region |
| 65 | + |
| 66 | +allOf: |
| 67 | + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# |
| 68 | + - if: |
| 69 | + properties: |
| 70 | + compatible: |
| 71 | + enum: |
| 72 | + - qcom,milos-adsp-pas |
| 73 | + - qcom,milos-cdsp-pas |
| 74 | + then: |
| 75 | + properties: |
| 76 | + memory-region: |
| 77 | + minItems: 2 |
| 78 | + firmware-name: |
| 79 | + minItems: 2 |
| 80 | + else: |
| 81 | + properties: |
| 82 | + memory-region: |
| 83 | + maxItems: 1 |
| 84 | + firmware-name: |
| 85 | + maxItems: 1 |
| 86 | + |
| 87 | + - if: |
| 88 | + properties: |
| 89 | + compatible: |
| 90 | + contains: |
| 91 | + enum: |
| 92 | + - qcom,milos-adsp-pas |
| 93 | + then: |
| 94 | + properties: |
| 95 | + power-domains: |
| 96 | + items: |
| 97 | + - description: LCX power domain |
| 98 | + - description: LMX power domain |
| 99 | + power-domain-names: |
| 100 | + items: |
| 101 | + - const: lcx |
| 102 | + - const: lmx |
| 103 | + |
| 104 | + - if: |
| 105 | + properties: |
| 106 | + compatible: |
| 107 | + enum: |
| 108 | + - qcom,milos-cdsp-pas |
| 109 | + - qcom,milos-wpss-pas |
| 110 | + then: |
| 111 | + properties: |
| 112 | + power-domains: |
| 113 | + items: |
| 114 | + - description: CX power domain |
| 115 | + - description: MX power domain |
| 116 | + power-domain-names: |
| 117 | + items: |
| 118 | + - const: cx |
| 119 | + - const: mx |
| 120 | + |
| 121 | + - if: |
| 122 | + properties: |
| 123 | + compatible: |
| 124 | + enum: |
| 125 | + - qcom,milos-mpss-pas |
| 126 | + then: |
| 127 | + properties: |
| 128 | + power-domains: |
| 129 | + items: |
| 130 | + - description: CX power domain |
| 131 | + - description: MSS power domain |
| 132 | + power-domain-names: |
| 133 | + items: |
| 134 | + - const: cx |
| 135 | + - const: mss |
| 136 | + |
| 137 | +unevaluatedProperties: false |
| 138 | + |
| 139 | +examples: |
| 140 | + - | |
| 141 | + #include <dt-bindings/clock/qcom,rpmh.h> |
| 142 | + #include <dt-bindings/interconnect/qcom,icc.h> |
| 143 | + #include <dt-bindings/interconnect/qcom,milos-rpmh.h> |
| 144 | + #include <dt-bindings/interrupt-controller/irq.h> |
| 145 | + #include <dt-bindings/mailbox/qcom-ipcc.h> |
| 146 | + #include <dt-bindings/power/qcom,rpmhpd.h> |
| 147 | +
|
| 148 | + remoteproc@3000000 { |
| 149 | + compatible = "qcom,milos-adsp-pas"; |
| 150 | + reg = <0x03000000 0x10000>; |
| 151 | +
|
| 152 | + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, |
| 153 | + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, |
| 154 | + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, |
| 155 | + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, |
| 156 | + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>, |
| 157 | + <&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>; |
| 158 | + interrupt-names = "wdog", |
| 159 | + "fatal", |
| 160 | + "ready", |
| 161 | + "handover", |
| 162 | + "stop-ack", |
| 163 | + "shutdown-ack"; |
| 164 | +
|
| 165 | + clocks = <&rpmhcc RPMH_CXO_CLK>; |
| 166 | + clock-names = "xo"; |
| 167 | +
|
| 168 | + power-domains = <&rpmhpd RPMHPD_LCX>, |
| 169 | + <&rpmhpd RPMHPD_LMX>; |
| 170 | + power-domain-names = "lcx", |
| 171 | + "lmx"; |
| 172 | +
|
| 173 | + interconnects = <&lpass_ag_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS |
| 174 | + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; |
| 175 | +
|
| 176 | + memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>; |
| 177 | +
|
| 178 | + firmware-name = "qcom/milos/vendor/device/adsp.mbn", |
| 179 | + "qcom/milos/vendor/device/adsp_dtb.mbn"; |
| 180 | +
|
| 181 | + qcom,qmp = <&aoss_qmp>; |
| 182 | +
|
| 183 | + qcom,smem-states = <&smp2p_adsp_out 0>; |
| 184 | + qcom,smem-state-names = "stop"; |
| 185 | +
|
| 186 | + glink-edge { |
| 187 | + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS |
| 188 | + IPCC_MPROC_SIGNAL_GLINK_QMP |
| 189 | + IRQ_TYPE_EDGE_RISING>; |
| 190 | + mboxes = <&ipcc IPCC_CLIENT_LPASS |
| 191 | + IPCC_MPROC_SIGNAL_GLINK_QMP>; |
| 192 | +
|
| 193 | + label = "lpass"; |
| 194 | + qcom,remote-pid = <2>; |
| 195 | +
|
| 196 | + /* ... */ |
| 197 | + }; |
| 198 | + }; |
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