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dramforeverdlan17
dramforever
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riscv: dts: spacemit: Move UARTs under dma-bus for K1
UART devices in Spacemit K1 use dma-bus DMA translations. Move these nodes under dma-bus to reflect this fact. Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Reviewed-by: Guodong Xu <guodong@riscstar.com> Link: https://lore.kernel.org/r/20250623-k1-dma-buses-rfc-wip-v1-2-c0144082061f@iscas.ac.cn Signed-off-by: Yixun Lan <dlan@gentoo.org>
1 parent 2f793d0 commit 277f852

1 file changed

Lines changed: 128 additions & 118 deletions

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  • arch/riscv/boot/dts/spacemit

‎arch/riscv/boot/dts/spacemit/k1.dtsi‎

Lines changed: 128 additions & 118 deletions
Original file line numberDiff line numberDiff line change
@@ -369,114 +369,6 @@
369369
#reset-cells = <1>;
370370
};
371371

372-
uart0: serial@d4017000 {
373-
compatible = "spacemit,k1-uart", "intel,xscale-uart";
374-
reg = <0x0 0xd4017000 0x0 0x100>;
375-
clocks = <&syscon_apbc CLK_UART0>,
376-
<&syscon_apbc CLK_UART0_BUS>;
377-
clock-names = "core", "bus";
378-
interrupts = <42>;
379-
reg-shift = <2>;
380-
reg-io-width = <4>;
381-
status = "disabled";
382-
};
383-
384-
uart2: serial@d4017100 {
385-
compatible = "spacemit,k1-uart", "intel,xscale-uart";
386-
reg = <0x0 0xd4017100 0x0 0x100>;
387-
clocks = <&syscon_apbc CLK_UART2>,
388-
<&syscon_apbc CLK_UART2_BUS>;
389-
clock-names = "core", "bus";
390-
interrupts = <44>;
391-
reg-shift = <2>;
392-
reg-io-width = <4>;
393-
status = "disabled";
394-
};
395-
396-
uart3: serial@d4017200 {
397-
compatible = "spacemit,k1-uart", "intel,xscale-uart";
398-
reg = <0x0 0xd4017200 0x0 0x100>;
399-
clocks = <&syscon_apbc CLK_UART3>,
400-
<&syscon_apbc CLK_UART3_BUS>;
401-
clock-names = "core", "bus";
402-
interrupts = <45>;
403-
reg-shift = <2>;
404-
reg-io-width = <4>;
405-
status = "disabled";
406-
};
407-
408-
uart4: serial@d4017300 {
409-
compatible = "spacemit,k1-uart", "intel,xscale-uart";
410-
reg = <0x0 0xd4017300 0x0 0x100>;
411-
clocks = <&syscon_apbc CLK_UART4>,
412-
<&syscon_apbc CLK_UART4_BUS>;
413-
clock-names = "core", "bus";
414-
interrupts = <46>;
415-
reg-shift = <2>;
416-
reg-io-width = <4>;
417-
status = "disabled";
418-
};
419-
420-
uart5: serial@d4017400 {
421-
compatible = "spacemit,k1-uart", "intel,xscale-uart";
422-
reg = <0x0 0xd4017400 0x0 0x100>;
423-
clocks = <&syscon_apbc CLK_UART5>,
424-
<&syscon_apbc CLK_UART5_BUS>;
425-
clock-names = "core", "bus";
426-
interrupts = <47>;
427-
reg-shift = <2>;
428-
reg-io-width = <4>;
429-
status = "disabled";
430-
};
431-
432-
uart6: serial@d4017500 {
433-
compatible = "spacemit,k1-uart", "intel,xscale-uart";
434-
reg = <0x0 0xd4017500 0x0 0x100>;
435-
clocks = <&syscon_apbc CLK_UART6>,
436-
<&syscon_apbc CLK_UART6_BUS>;
437-
clock-names = "core", "bus";
438-
interrupts = <48>;
439-
reg-shift = <2>;
440-
reg-io-width = <4>;
441-
status = "disabled";
442-
};
443-
444-
uart7: serial@d4017600 {
445-
compatible = "spacemit,k1-uart", "intel,xscale-uart";
446-
reg = <0x0 0xd4017600 0x0 0x100>;
447-
clocks = <&syscon_apbc CLK_UART7>,
448-
<&syscon_apbc CLK_UART7_BUS>;
449-
clock-names = "core", "bus";
450-
interrupts = <49>;
451-
reg-shift = <2>;
452-
reg-io-width = <4>;
453-
status = "disabled";
454-
};
455-
456-
uart8: serial@d4017700 {
457-
compatible = "spacemit,k1-uart", "intel,xscale-uart";
458-
reg = <0x0 0xd4017700 0x0 0x100>;
459-
clocks = <&syscon_apbc CLK_UART8>,
460-
<&syscon_apbc CLK_UART8_BUS>;
461-
clock-names = "core", "bus";
462-
interrupts = <50>;
463-
reg-shift = <2>;
464-
reg-io-width = <4>;
465-
status = "disabled";
466-
};
467-
468-
uart9: serial@d4017800 {
469-
compatible = "spacemit,k1-uart", "intel,xscale-uart";
470-
reg = <0x0 0xd4017800 0x0 0x100>;
471-
clocks = <&syscon_apbc CLK_UART9>,
472-
<&syscon_apbc CLK_UART9_BUS>;
473-
clock-names = "core", "bus";
474-
interrupts = <51>;
475-
reg-shift = <2>;
476-
reg-io-width = <4>;
477-
status = "disabled";
478-
};
479-
480372
gpio: gpio@d4019000 {
481373
compatible = "spacemit,k1-gpio";
482374
reg = <0x0 0xd4019000 0x0 0x100>;
@@ -760,16 +652,6 @@
760652
#reset-cells = <1>;
761653
};
762654

763-
sec_uart1: serial@f0612000 {
764-
compatible = "spacemit,k1-uart", "intel,xscale-uart";
765-
reg = <0x0 0xf0612000 0x0 0x100>;
766-
interrupts = <43>;
767-
clock-frequency = <14857000>;
768-
reg-shift = <2>;
769-
reg-io-width = <4>;
770-
status = "reserved"; /* for TEE usage */
771-
};
772-
773655
camera-bus {
774656
compatible = "simple-bus";
775657
ranges;
@@ -786,6 +668,134 @@
786668
#size-cells = <2>;
787669
dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
788670
<0x1 0x00000000 0x1 0x80000000 0x3 0x00000000>;
671+
672+
uart0: serial@d4017000 {
673+
compatible = "spacemit,k1-uart",
674+
"intel,xscale-uart";
675+
reg = <0x0 0xd4017000 0x0 0x100>;
676+
clocks = <&syscon_apbc CLK_UART0>,
677+
<&syscon_apbc CLK_UART0_BUS>;
678+
clock-names = "core", "bus";
679+
interrupts = <42>;
680+
reg-shift = <2>;
681+
reg-io-width = <4>;
682+
status = "disabled";
683+
};
684+
685+
uart2: serial@d4017100 {
686+
compatible = "spacemit,k1-uart",
687+
"intel,xscale-uart";
688+
reg = <0x0 0xd4017100 0x0 0x100>;
689+
clocks = <&syscon_apbc CLK_UART2>,
690+
<&syscon_apbc CLK_UART2_BUS>;
691+
clock-names = "core", "bus";
692+
interrupts = <44>;
693+
reg-shift = <2>;
694+
reg-io-width = <4>;
695+
status = "disabled";
696+
};
697+
698+
uart3: serial@d4017200 {
699+
compatible = "spacemit,k1-uart",
700+
"intel,xscale-uart";
701+
reg = <0x0 0xd4017200 0x0 0x100>;
702+
clocks = <&syscon_apbc CLK_UART3>,
703+
<&syscon_apbc CLK_UART3_BUS>;
704+
clock-names = "core", "bus";
705+
interrupts = <45>;
706+
reg-shift = <2>;
707+
reg-io-width = <4>;
708+
status = "disabled";
709+
};
710+
711+
uart4: serial@d4017300 {
712+
compatible = "spacemit,k1-uart",
713+
"intel,xscale-uart";
714+
reg = <0x0 0xd4017300 0x0 0x100>;
715+
clocks = <&syscon_apbc CLK_UART4>,
716+
<&syscon_apbc CLK_UART4_BUS>;
717+
clock-names = "core", "bus";
718+
interrupts = <46>;
719+
reg-shift = <2>;
720+
reg-io-width = <4>;
721+
status = "disabled";
722+
};
723+
724+
uart5: serial@d4017400 {
725+
compatible = "spacemit,k1-uart",
726+
"intel,xscale-uart";
727+
reg = <0x0 0xd4017400 0x0 0x100>;
728+
clocks = <&syscon_apbc CLK_UART5>,
729+
<&syscon_apbc CLK_UART5_BUS>;
730+
clock-names = "core", "bus";
731+
interrupts = <47>;
732+
reg-shift = <2>;
733+
reg-io-width = <4>;
734+
status = "disabled";
735+
};
736+
737+
uart6: serial@d4017500 {
738+
compatible = "spacemit,k1-uart",
739+
"intel,xscale-uart";
740+
reg = <0x0 0xd4017500 0x0 0x100>;
741+
clocks = <&syscon_apbc CLK_UART6>,
742+
<&syscon_apbc CLK_UART6_BUS>;
743+
clock-names = "core", "bus";
744+
interrupts = <48>;
745+
reg-shift = <2>;
746+
reg-io-width = <4>;
747+
status = "disabled";
748+
};
749+
750+
uart7: serial@d4017600 {
751+
compatible = "spacemit,k1-uart",
752+
"intel,xscale-uart";
753+
reg = <0x0 0xd4017600 0x0 0x100>;
754+
clocks = <&syscon_apbc CLK_UART7>,
755+
<&syscon_apbc CLK_UART7_BUS>;
756+
clock-names = "core", "bus";
757+
interrupts = <49>;
758+
reg-shift = <2>;
759+
reg-io-width = <4>;
760+
status = "disabled";
761+
};
762+
763+
uart8: serial@d4017700 {
764+
compatible = "spacemit,k1-uart",
765+
"intel,xscale-uart";
766+
reg = <0x0 0xd4017700 0x0 0x100>;
767+
clocks = <&syscon_apbc CLK_UART8>,
768+
<&syscon_apbc CLK_UART8_BUS>;
769+
clock-names = "core", "bus";
770+
interrupts = <50>;
771+
reg-shift = <2>;
772+
reg-io-width = <4>;
773+
status = "disabled";
774+
};
775+
776+
uart9: serial@d4017800 {
777+
compatible = "spacemit,k1-uart",
778+
"intel,xscale-uart";
779+
reg = <0x0 0xd4017800 0x0 0x100>;
780+
clocks = <&syscon_apbc CLK_UART9>,
781+
<&syscon_apbc CLK_UART9_BUS>;
782+
clock-names = "core", "bus";
783+
interrupts = <51>;
784+
reg-shift = <2>;
785+
reg-io-width = <4>;
786+
status = "disabled";
787+
};
788+
789+
sec_uart1: serial@f0612000 {
790+
compatible = "spacemit,k1-uart",
791+
"intel,xscale-uart";
792+
reg = <0x0 0xf0612000 0x0 0x100>;
793+
interrupts = <43>;
794+
clock-frequency = <14857000>;
795+
reg-shift = <2>;
796+
reg-io-width = <4>;
797+
status = "reserved"; /* for TEE usage */
798+
};
789799
};
790800

791801
multimedia-bus {

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