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Bartosz Golaszewski
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gpio: mt7621: use the generic GPIO chip lock for IRQ handling
This driver uses its own spinlock in interrupt routines while the generic GPIO chip callbacks use a separate one. This is, of course, racy so use the fact that the lock in generic GPIO chip is also a spinlock and convert the interrupt handling functions in this module to using the provided generic GPIO chip locking API. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250910-gpio-mmio-gpio-conv-part4-v2-9-f3d1a4c57124@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
1 parent 80fd7e9 commit 2c1f22f

1 file changed

Lines changed: 12 additions & 17 deletions

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drivers/gpio/gpio-mt7621.c

Lines changed: 12 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,6 @@
1111
#include <linux/io.h>
1212
#include <linux/module.h>
1313
#include <linux/platform_device.h>
14-
#include <linux/spinlock.h>
1514

1615
#define MTK_BANK_CNT 3
1716
#define MTK_BANK_WIDTH 32
@@ -32,7 +31,6 @@
3231
struct mtk_gc {
3332
struct irq_chip irq_chip;
3433
struct gpio_generic_chip chip;
35-
spinlock_t lock;
3634
int bank;
3735
u32 rising;
3836
u32 falling;
@@ -111,12 +109,12 @@ mediatek_gpio_irq_unmask(struct irq_data *d)
111109
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
112110
struct mtk_gc *rg = to_mediatek_gpio(gc);
113111
int pin = d->hwirq;
114-
unsigned long flags;
115112
u32 rise, fall, high, low;
116113

117114
gpiochip_enable_irq(gc, d->hwirq);
118115

119-
spin_lock_irqsave(&rg->lock, flags);
116+
guard(gpio_generic_lock_irqsave)(&rg->chip);
117+
120118
rise = mtk_gpio_r32(rg, GPIO_REG_REDGE);
121119
fall = mtk_gpio_r32(rg, GPIO_REG_FEDGE);
122120
high = mtk_gpio_r32(rg, GPIO_REG_HLVL);
@@ -125,7 +123,6 @@ mediatek_gpio_irq_unmask(struct irq_data *d)
125123
mtk_gpio_w32(rg, GPIO_REG_FEDGE, fall | (BIT(pin) & rg->falling));
126124
mtk_gpio_w32(rg, GPIO_REG_HLVL, high | (BIT(pin) & rg->hlevel));
127125
mtk_gpio_w32(rg, GPIO_REG_LLVL, low | (BIT(pin) & rg->llevel));
128-
spin_unlock_irqrestore(&rg->lock, flags);
129126
}
130127

131128
static void
@@ -134,19 +131,18 @@ mediatek_gpio_irq_mask(struct irq_data *d)
134131
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
135132
struct mtk_gc *rg = to_mediatek_gpio(gc);
136133
int pin = d->hwirq;
137-
unsigned long flags;
138134
u32 rise, fall, high, low;
139135

140-
spin_lock_irqsave(&rg->lock, flags);
141-
rise = mtk_gpio_r32(rg, GPIO_REG_REDGE);
142-
fall = mtk_gpio_r32(rg, GPIO_REG_FEDGE);
143-
high = mtk_gpio_r32(rg, GPIO_REG_HLVL);
144-
low = mtk_gpio_r32(rg, GPIO_REG_LLVL);
145-
mtk_gpio_w32(rg, GPIO_REG_FEDGE, fall & ~BIT(pin));
146-
mtk_gpio_w32(rg, GPIO_REG_REDGE, rise & ~BIT(pin));
147-
mtk_gpio_w32(rg, GPIO_REG_HLVL, high & ~BIT(pin));
148-
mtk_gpio_w32(rg, GPIO_REG_LLVL, low & ~BIT(pin));
149-
spin_unlock_irqrestore(&rg->lock, flags);
136+
scoped_guard(gpio_generic_lock_irqsave, &rg->chip) {
137+
rise = mtk_gpio_r32(rg, GPIO_REG_REDGE);
138+
fall = mtk_gpio_r32(rg, GPIO_REG_FEDGE);
139+
high = mtk_gpio_r32(rg, GPIO_REG_HLVL);
140+
low = mtk_gpio_r32(rg, GPIO_REG_LLVL);
141+
mtk_gpio_w32(rg, GPIO_REG_FEDGE, fall & ~BIT(pin));
142+
mtk_gpio_w32(rg, GPIO_REG_REDGE, rise & ~BIT(pin));
143+
mtk_gpio_w32(rg, GPIO_REG_HLVL, high & ~BIT(pin));
144+
mtk_gpio_w32(rg, GPIO_REG_LLVL, low & ~BIT(pin));
145+
}
150146

151147
gpiochip_disable_irq(gc, d->hwirq);
152148
}
@@ -232,7 +228,6 @@ mediatek_gpio_bank_probe(struct device *dev, int bank)
232228
rg = &mtk->gc_map[bank];
233229
memset(rg, 0, sizeof(*rg));
234230

235-
spin_lock_init(&rg->lock);
236231
rg->bank = bank;
237232

238233
dat = mtk->base + GPIO_REG_DATA + (rg->bank * GPIO_BANK_STRIDE);

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