Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"

This reverts commit dd26402.

The issue George met is due to the limit of QPIC, not the issue of the
flash chip.

QPIC only supports 4 bytes ID. So the fifth byte is always 0.

If we use spi-gpio, the fifth byte can be read correctly.

Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

Author: hzyitc

drivers/mtd/nand/spi/esmt.c

@@ -215,7 +215,7 @@ static const struct spinand_info esmt_c8_spinand_table[] = {
 		     SPINAND_FACT_OTP_INFO(2, 0, &f50l1g41lb_fact_otp_ops)),
 	SPINAND_INFO("F50D1G41LB",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11, 0x7f,
-				0x7f),
+				0x7f, 0x7f),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,