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Anjelique Melendezdlezcano
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thermal/drivers/qcom-spmi-temp-alarm: Add support for GEN2 rev 2 PMIC peripherals
Add support for TEMP_ALARM GEN2 PMIC peripherals with digital major revision 2. This revision utilizes individual temp DAC registers to set the threshold temperature for over-temperature stages 1 (warning), 2 (system shutdown), and 3 (emergency shutdown) instead of a single register to specify a set of thresholds. Co-developed-by: David Collins <david.collins@oss.qualcomm.com> Signed-off-by: David Collins <david.collins@oss.qualcomm.com> Signed-off-by: Anjelique Melendez <anjelique.melendez@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250710224555.3047790-5-anjelique.melendez@oss.qualcomm.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Lines changed: 137 additions & 1 deletion

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drivers/thermal/qcom/qcom-spmi-temp-alarm.c

Lines changed: 137 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,11 @@
2626
#define QPNP_TM_REG_SHUTDOWN_CTRL1 0x40
2727
#define QPNP_TM_REG_ALARM_CTRL 0x46
2828

29+
/* TEMP_DAC_STGx registers are only present for TEMP_GEN2 v2.0 */
30+
#define QPNP_TM_REG_TEMP_DAC_STG1 0x47
31+
#define QPNP_TM_REG_TEMP_DAC_STG2 0x48
32+
#define QPNP_TM_REG_TEMP_DAC_STG3 0x49
33+
2934
#define QPNP_TM_TYPE 0x09
3035
#define QPNP_TM_SUBTYPE_GEN1 0x08
3136
#define QPNP_TM_SUBTYPE_GEN2 0x09
@@ -71,6 +76,25 @@ static const long temp_map_gen2_v1[THRESH_COUNT][STAGE_COUNT] = {
7176

7277
#define TEMP_STAGE_HYSTERESIS 2000
7378

79+
/*
80+
* For TEMP_GEN2 v2.0, TEMP_DAC_STG1/2/3 registers are used to set the threshold
81+
* for each stage independently.
82+
* TEMP_DAC_STG* = 0 --> 80 C
83+
* Each 8 step increase in TEMP_DAC_STG* value corresponds to 5 C (5000 mC).
84+
*/
85+
#define TEMP_DAC_MIN 80000
86+
#define TEMP_DAC_SCALE_NUM 8
87+
#define TEMP_DAC_SCALE_DEN 5000
88+
89+
#define TEMP_DAC_TEMP_TO_REG(temp) \
90+
(((temp) - TEMP_DAC_MIN) * TEMP_DAC_SCALE_NUM / TEMP_DAC_SCALE_DEN)
91+
#define TEMP_DAC_REG_TO_TEMP(reg) \
92+
(TEMP_DAC_MIN + (reg) * TEMP_DAC_SCALE_DEN / TEMP_DAC_SCALE_NUM)
93+
94+
static const long temp_dac_max[STAGE_COUNT] = {
95+
119375, 159375, 159375
96+
};
97+
7498
/* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
7599
#define DEFAULT_TEMP 37000
76100

@@ -93,6 +117,7 @@ struct qpnp_tm_chip {
93117
long temp;
94118
unsigned int stage;
95119
unsigned int base;
120+
unsigned int ntrips;
96121
/* protects .thresh, .stage and chip registers */
97122
struct mutex lock;
98123
bool initialized;
@@ -310,6 +335,54 @@ static const struct thermal_zone_device_ops qpnp_tm_sensor_ops = {
310335
.set_trip_temp = qpnp_tm_set_trip_temp,
311336
};
312337

338+
static int qpnp_tm_gen2_rev2_set_temp_thresh(struct qpnp_tm_chip *chip, unsigned int trip, int temp)
339+
{
340+
int ret, temp_cfg;
341+
u8 reg;
342+
343+
WARN_ON(!mutex_is_locked(&chip->lock));
344+
345+
if (trip >= STAGE_COUNT) {
346+
dev_err(chip->dev, "invalid TEMP_DAC trip = %d\n", trip);
347+
return -EINVAL;
348+
} else if (temp < TEMP_DAC_MIN || temp > temp_dac_max[trip]) {
349+
dev_err(chip->dev, "invalid TEMP_DAC temp = %d\n", temp);
350+
return -EINVAL;
351+
}
352+
353+
reg = TEMP_DAC_TEMP_TO_REG(temp);
354+
temp_cfg = TEMP_DAC_REG_TO_TEMP(reg);
355+
356+
ret = qpnp_tm_write(chip, QPNP_TM_REG_TEMP_DAC_STG1 + trip, reg);
357+
if (ret < 0) {
358+
dev_err(chip->dev, "TEMP_DAC_STG write failed, ret=%d\n", ret);
359+
return ret;
360+
}
361+
362+
chip->temp_thresh_map[trip] = temp_cfg;
363+
364+
return 0;
365+
}
366+
367+
static int qpnp_tm_gen2_rev2_set_trip_temp(struct thermal_zone_device *tz,
368+
const struct thermal_trip *trip, int temp)
369+
{
370+
unsigned int trip_index = THERMAL_TRIP_PRIV_TO_INT(trip->priv);
371+
struct qpnp_tm_chip *chip = thermal_zone_device_priv(tz);
372+
int ret;
373+
374+
mutex_lock(&chip->lock);
375+
ret = qpnp_tm_gen2_rev2_set_temp_thresh(chip, trip_index, temp);
376+
mutex_unlock(&chip->lock);
377+
378+
return ret;
379+
}
380+
381+
static const struct thermal_zone_device_ops qpnp_tm_gen2_rev2_sensor_ops = {
382+
.get_temp = qpnp_tm_get_temp,
383+
.set_trip_temp = qpnp_tm_gen2_rev2_set_trip_temp,
384+
};
385+
313386
static irqreturn_t qpnp_tm_isr(int irq, void *data)
314387
{
315388
struct qpnp_tm_chip *chip = data;
@@ -351,6 +424,60 @@ static int qpnp_tm_configure_trip_temp(struct qpnp_tm_chip *chip)
351424
return ret;
352425
}
353426

427+
/* Configure TEMP_DAC registers based on DT thermal_zone trips */
428+
static int qpnp_tm_gen2_rev2_configure_trip_temps_cb(struct thermal_trip *trip, void *data)
429+
{
430+
struct qpnp_tm_chip *chip = data;
431+
int ret;
432+
433+
mutex_lock(&chip->lock);
434+
trip->priv = THERMAL_INT_TO_TRIP_PRIV(chip->ntrips);
435+
ret = qpnp_tm_gen2_rev2_set_temp_thresh(chip, chip->ntrips, trip->temperature);
436+
chip->ntrips++;
437+
mutex_unlock(&chip->lock);
438+
439+
return ret;
440+
}
441+
442+
static int qpnp_tm_gen2_rev2_configure_trip_temps(struct qpnp_tm_chip *chip)
443+
{
444+
int ret, i;
445+
446+
ret = thermal_zone_for_each_trip(chip->tz_dev,
447+
qpnp_tm_gen2_rev2_configure_trip_temps_cb, chip);
448+
if (ret < 0)
449+
return ret;
450+
451+
/* Verify that trips are strictly increasing. */
452+
for (i = 1; i < STAGE_COUNT; i++) {
453+
if (chip->temp_thresh_map[i] <= chip->temp_thresh_map[i - 1]) {
454+
dev_err(chip->dev, "Threshold %d=%ld <= threshold %d=%ld\n",
455+
i, chip->temp_thresh_map[i], i - 1,
456+
chip->temp_thresh_map[i - 1]);
457+
return -EINVAL;
458+
}
459+
}
460+
461+
return 0;
462+
}
463+
464+
/* Read the hardware default TEMP_DAC stage threshold temperatures */
465+
static int qpnp_tm_gen2_rev2_sync_thresholds(struct qpnp_tm_chip *chip)
466+
{
467+
int ret, i;
468+
u8 reg = 0;
469+
470+
for (i = 0; i < STAGE_COUNT; i++) {
471+
ret = qpnp_tm_read(chip, QPNP_TM_REG_TEMP_DAC_STG1 + i, &reg);
472+
if (ret < 0)
473+
return ret;
474+
475+
chip->temp_thresh_map[i] = TEMP_DAC_REG_TO_TEMP(reg);
476+
}
477+
478+
return 0;
479+
}
480+
354481
static const struct spmi_temp_alarm_data spmi_temp_alarm_data = {
355482
.ops = &qpnp_tm_sensor_ops,
356483
.temp_map = &temp_map_gen1,
@@ -375,6 +502,13 @@ static const struct spmi_temp_alarm_data spmi_temp_alarm_gen2_rev1_data = {
375502
.get_temp_stage = qpnp_tm_gen2_get_temp_stage,
376503
};
377504

505+
static const struct spmi_temp_alarm_data spmi_temp_alarm_gen2_rev2_data = {
506+
.ops = &qpnp_tm_gen2_rev2_sensor_ops,
507+
.sync_thresholds = qpnp_tm_gen2_rev2_sync_thresholds,
508+
.configure_trip_temps = qpnp_tm_gen2_rev2_configure_trip_temps,
509+
.get_temp_stage = qpnp_tm_gen2_get_temp_stage,
510+
};
511+
378512
/*
379513
* This function initializes the internal temp value based on only the
380514
* current thermal stage and threshold.
@@ -491,8 +625,10 @@ static int qpnp_tm_probe(struct platform_device *pdev)
491625
chip->data = &spmi_temp_alarm_data;
492626
else if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major == 0)
493627
chip->data = &spmi_temp_alarm_gen2_data;
494-
else if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 1)
628+
else if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major == 1)
495629
chip->data = &spmi_temp_alarm_gen2_rev1_data;
630+
else if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 2)
631+
chip->data = &spmi_temp_alarm_gen2_rev2_data;
496632
else
497633
return -ENODEV;
498634

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