arm64: dts: apple: Add NVMe nodes to M3 (t8122) device tree

On Apple Silicon, NVMe communication is mediated by a
coprocessor known as the ANS, and protected by its own
IOMMU known as the SART.

Add the following nodes to the M3 (t8122) device tree:
- Mailbox for the ANS coprocessor
- SART (IOMMU for the ANS coprocessor)
- The NVMe / ANS coprocessor itself

Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>

Author: IntegralPilot

arch/arm64/boot/dts/apple/t8122.dtsi

@@ -465,6 +465,45 @@
 				     <AIC_IRQ 351 IRQ_TYPE_LEVEL_HIGH>,
 				     <AIC_IRQ 352 IRQ_TYPE_LEVEL_HIGH>;
 		};
+
+		ans_mbox: mbox@309408000 {
+			compatible = "apple,t8122-asc-mailbox", "apple,asc-mailbox-v4";
+			reg = <0x3 0x09408000 0x0 0x4000>;
+
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 730 IRQ_TYPE_LEVEL_HIGH>,
+				<AIC_IRQ 731 IRQ_TYPE_LEVEL_HIGH>,
+				<AIC_IRQ 732 IRQ_TYPE_LEVEL_HIGH>,
+				<AIC_IRQ 733 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "send-empty", "send-not-empty",
+					  "recv-empty", "recv-not-empty";
+
+			#mbox-cells = <0>;
+			power-domains = <&ps_ans>;
+		};
+
+		sart: sart@30dc50000 {
+			compatible = "apple,t8122-sart", "apple,t6000-sart";
+			reg = <0x3 0x0dc50000 0x0 0x10000>;
+			power-domains = <&ps_ans>;
+		};
+
+		nvme: nvme@30dcc0000 {
+			compatible = "apple,t8122-nvme-ans2", "apple,t8103-nvme-ans2";
+		 	reg = <0x3 0x0dcc0000 0x0 0x60000>,
+		 		<0x3 0x09400000 0x0 0x4000>;
+		 	reg-names = "nvme", "ans";
+
+		 	interrupt-parent = <&aic>;
+		 	interrupts = <AIC_IRQ 742 IRQ_TYPE_LEVEL_HIGH>;
+
+		 	mboxes = <&ans_mbox>;
+		 	apple,sart = <&sart>;
+
+			power-domains = <&ps_ans>, <&ps_apcie_phy_sw>;
+			power-domain-names = "ans", "apcie0";
+			resets = <&ps_ans>;
+		};
 	};
 };