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torvaldstorvalds
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Merge tag 'drm-fixes-2026-01-30' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "Seems to be a bit quieter this week, mostly xe and amdgpu, with msm and imx fixes and one WARN_ON from user blocked. Nothing of note outstanding either. uapi: - Fix a WARN_ON() when passing an invalid handle to drm_gem_change_handle_ioctl() msm: - GPU: - Fix bogus hwcg register update for a690 xe: - Skip address copy for sync-only execs - Fix a WA - Derive mem_copy cap from graphics version - Fix is_bound() pci_dev lifetime - xe nvm cleanup fixes amdgpu: - SMU 13 fixes - SMU 14 fixes - GPUVM fault filter fix - Powergating fix - HDMI debounce fix - Xclk fix for soc21 APUs - Fix COND_EXEC handling for GC 11 - GC 10-12 KGQ init fixes - GC 11-12 KGQ reset fixes imx/tve: - drop ddc device reference when unloading" * tag 'drm-fixes-2026-01-30' of https://gitlab.freedesktop.org/drm/kernel: (21 commits) drm/xe/nvm: Fix double-free on aux add failure drm/xe/nvm: Manage nvm aux cleanup with devres drm/amdgpu/gfx12: adjust KGQ reset sequence drm/amdgpu/gfx11: adjust KGQ reset sequence drm/amdgpu/gfx12: fix wptr reset in KGQ init drm/amdgpu/gfx11: fix wptr reset in KGQ init drm/amdgpu/gfx10: fix wptr reset in KGQ init drm/xe/configfs: Fix is_bound() pci_dev lifetime drm/amdgpu: Fix cond_exec handling in amdgpu_ib_schedule() drm/amdgpu/soc21: fix xclk for APUs drm/amd/display: Clear HDMI HPD pending work only if it is enabled drm/imx/tve: fix probe device leak drm/amd/pm: fix race in power state check before mutex lock drm/amdgpu: fix NULL pointer dereference in amdgpu_gmc_filter_faults_remove drm/amd/pm: fix smu v14 soft clock frequency setting issue drm/amd/pm: fix smu v13 soft clock frequency setting issue drm/xe: derive mem copy capability from graphics version drm/xe/xelp: Fix Wa_18022495364 drm/xe: Skip address copy for sync-only execs drm: Do not allow userspace to trigger kernel warnings in drm_gem_change_handle_ioctl() ...
2 parents 4d31079 + 3a390a2 commit 4327db8

23 files changed

Lines changed: 117 additions & 86 deletions

File tree

‎drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -498,8 +498,13 @@ void amdgpu_gmc_filter_faults_remove(struct amdgpu_device *adev, uint64_t addr,
498498

499499
if (adev->irq.retry_cam_enabled)
500500
return;
501+
else if (adev->irq.ih1.ring_size)
502+
ih = &adev->irq.ih1;
503+
else if (adev->irq.ih_soft.enabled)
504+
ih = &adev->irq.ih_soft;
505+
else
506+
return;
501507

502-
ih = &adev->irq.ih1;
503508
/* Get the WPTR of the last entry in IH ring */
504509
last_wptr = amdgpu_ih_get_wptr(adev, ih);
505510
/* Order wptr with ring data. */

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -235,7 +235,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,
235235

236236
amdgpu_ring_ib_begin(ring);
237237

238-
if (ring->funcs->emit_gfx_shadow)
238+
if (ring->funcs->emit_gfx_shadow && adev->gfx.cp_gfx_shadow)
239239
amdgpu_ring_emit_gfx_shadow(ring, shadow_va, csa_va, gds_va,
240240
init_shadow, vmid);
241241

@@ -291,7 +291,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,
291291
fence_flags | AMDGPU_FENCE_FLAG_64BIT);
292292
}
293293

294-
if (ring->funcs->emit_gfx_shadow && ring->funcs->init_cond_exec) {
294+
if (ring->funcs->emit_gfx_shadow && ring->funcs->init_cond_exec &&
295+
adev->gfx.cp_gfx_shadow) {
295296
amdgpu_ring_emit_gfx_shadow(ring, 0, 0, 0, false, 0);
296297
amdgpu_ring_init_cond_exec(ring, ring->cond_exe_gpu_addr);
297298
}

‎drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6879,7 +6879,7 @@ static int gfx_v10_0_kgq_init_queue(struct amdgpu_ring *ring, bool reset)
68796879
memcpy_toio(mqd, adev->gfx.me.mqd_backup[mqd_idx], sizeof(*mqd));
68806880
/* reset the ring */
68816881
ring->wptr = 0;
6882-
*ring->wptr_cpu_addr = 0;
6882+
atomic64_set((atomic64_t *)ring->wptr_cpu_addr, 0);
68836883
amdgpu_ring_clear_ring(ring);
68846884
}
68856885

‎drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c‎

Lines changed: 14 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -4201,7 +4201,7 @@ static int gfx_v11_0_kgq_init_queue(struct amdgpu_ring *ring, bool reset)
42014201
memcpy_toio(mqd, adev->gfx.me.mqd_backup[mqd_idx], sizeof(*mqd));
42024202
/* reset the ring */
42034203
ring->wptr = 0;
4204-
*ring->wptr_cpu_addr = 0;
4204+
atomic64_set((atomic64_t *)ring->wptr_cpu_addr, 0);
42054205
amdgpu_ring_clear_ring(ring);
42064206
}
42074207

@@ -6823,11 +6823,12 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring,
68236823
struct amdgpu_fence *timedout_fence)
68246824
{
68256825
struct amdgpu_device *adev = ring->adev;
6826+
bool use_mmio = false;
68266827
int r;
68276828

68286829
amdgpu_ring_reset_helper_begin(ring, timedout_fence);
68296830

6830-
r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);
6831+
r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, use_mmio);
68316832
if (r) {
68326833

68336834
dev_warn(adev->dev, "reset via MES failed and try pipe reset %d\n", r);
@@ -6836,16 +6837,18 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring,
68366837
return r;
68376838
}
68386839

6839-
r = gfx_v11_0_kgq_init_queue(ring, true);
6840-
if (r) {
6841-
dev_err(adev->dev, "failed to init kgq\n");
6842-
return r;
6843-
}
6840+
if (use_mmio) {
6841+
r = gfx_v11_0_kgq_init_queue(ring, true);
6842+
if (r) {
6843+
dev_err(adev->dev, "failed to init kgq\n");
6844+
return r;
6845+
}
68446846

6845-
r = amdgpu_mes_map_legacy_queue(adev, ring);
6846-
if (r) {
6847-
dev_err(adev->dev, "failed to remap kgq\n");
6848-
return r;
6847+
r = amdgpu_mes_map_legacy_queue(adev, ring);
6848+
if (r) {
6849+
dev_err(adev->dev, "failed to remap kgq\n");
6850+
return r;
6851+
}
68496852
}
68506853

68516854
return amdgpu_ring_reset_helper_end(ring, timedout_fence);

‎drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c‎

Lines changed: 14 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -3079,7 +3079,7 @@ static int gfx_v12_0_kgq_init_queue(struct amdgpu_ring *ring, bool reset)
30793079
memcpy_toio(mqd, adev->gfx.me.mqd_backup[mqd_idx], sizeof(*mqd));
30803080
/* reset the ring */
30813081
ring->wptr = 0;
3082-
*ring->wptr_cpu_addr = 0;
3082+
atomic64_set((atomic64_t *)ring->wptr_cpu_addr, 0);
30833083
amdgpu_ring_clear_ring(ring);
30843084
}
30853085

@@ -5297,28 +5297,31 @@ static int gfx_v12_0_reset_kgq(struct amdgpu_ring *ring,
52975297
struct amdgpu_fence *timedout_fence)
52985298
{
52995299
struct amdgpu_device *adev = ring->adev;
5300+
bool use_mmio = false;
53005301
int r;
53015302

53025303
amdgpu_ring_reset_helper_begin(ring, timedout_fence);
53035304

5304-
r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);
5305+
r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, use_mmio);
53055306
if (r) {
53065307
dev_warn(adev->dev, "reset via MES failed and try pipe reset %d\n", r);
53075308
r = gfx_v12_reset_gfx_pipe(ring);
53085309
if (r)
53095310
return r;
53105311
}
53115312

5312-
r = gfx_v12_0_kgq_init_queue(ring, true);
5313-
if (r) {
5314-
dev_err(adev->dev, "failed to init kgq\n");
5315-
return r;
5316-
}
5313+
if (use_mmio) {
5314+
r = gfx_v12_0_kgq_init_queue(ring, true);
5315+
if (r) {
5316+
dev_err(adev->dev, "failed to init kgq\n");
5317+
return r;
5318+
}
53175319

5318-
r = amdgpu_mes_map_legacy_queue(adev, ring);
5319-
if (r) {
5320-
dev_err(adev->dev, "failed to remap kgq\n");
5321-
return r;
5320+
r = amdgpu_mes_map_legacy_queue(adev, ring);
5321+
if (r) {
5322+
dev_err(adev->dev, "failed to remap kgq\n");
5323+
return r;
5324+
}
53225325
}
53235326

53245327
return amdgpu_ring_reset_helper_end(ring, timedout_fence);

‎drivers/gpu/drm/amd/amdgpu/soc21.c‎

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -225,7 +225,13 @@ static u32 soc21_get_config_memsize(struct amdgpu_device *adev)
225225

226226
static u32 soc21_get_xclk(struct amdgpu_device *adev)
227227
{
228-
return adev->clock.spll.reference_freq;
228+
u32 reference_clock = adev->clock.spll.reference_freq;
229+
230+
/* reference clock is actually 99.81 Mhz rather than 100 Mhz */
231+
if ((adev->flags & AMD_IS_APU) && reference_clock == 10000)
232+
return 9981;
233+
234+
return reference_clock;
229235
}
230236

231237

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -7754,10 +7754,12 @@ static void amdgpu_dm_connector_destroy(struct drm_connector *connector)
77547754
drm_dp_mst_topology_mgr_destroy(&aconnector->mst_mgr);
77557755

77567756
/* Cancel and flush any pending HDMI HPD debounce work */
7757-
cancel_delayed_work_sync(&aconnector->hdmi_hpd_debounce_work);
7758-
if (aconnector->hdmi_prev_sink) {
7759-
dc_sink_release(aconnector->hdmi_prev_sink);
7760-
aconnector->hdmi_prev_sink = NULL;
7757+
if (aconnector->hdmi_hpd_debounce_delay_ms) {
7758+
cancel_delayed_work_sync(&aconnector->hdmi_hpd_debounce_work);
7759+
if (aconnector->hdmi_prev_sink) {
7760+
dc_sink_release(aconnector->hdmi_prev_sink);
7761+
aconnector->hdmi_prev_sink = NULL;
7762+
}
77617763
}
77627764

77637765
if (aconnector->bl_idx != -1) {

‎drivers/gpu/drm/amd/pm/amdgpu_dpm.c‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -80,15 +80,15 @@ int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev,
8080
enum ip_power_state pwr_state = gate ? POWER_STATE_OFF : POWER_STATE_ON;
8181
bool is_vcn = block_type == AMD_IP_BLOCK_TYPE_VCN;
8282

83+
mutex_lock(&adev->pm.mutex);
84+
8385
if (atomic_read(&adev->pm.pwr_state[block_type]) == pwr_state &&
8486
(!is_vcn || adev->vcn.num_vcn_inst == 1)) {
8587
dev_dbg(adev->dev, "IP block%d already in the target %s state!",
8688
block_type, gate ? "gate" : "ungate");
87-
return 0;
89+
goto out_unlock;
8890
}
8991

90-
mutex_lock(&adev->pm.mutex);
91-
9292
switch (block_type) {
9393
case AMD_IP_BLOCK_TYPE_UVD:
9494
case AMD_IP_BLOCK_TYPE_VCE:
@@ -115,6 +115,7 @@ int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev,
115115
if (!ret)
116116
atomic_set(&adev->pm.pwr_state[block_type], pwr_state);
117117

118+
out_unlock:
118119
mutex_unlock(&adev->pm.mutex);
119120

120121
return ret;

‎drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,7 @@
5656
#define SMUQ10_TO_UINT(x) ((x) >> 10)
5757
#define SMUQ10_FRAC(x) ((x) & 0x3ff)
5858
#define SMUQ10_ROUND(x) ((SMUQ10_TO_UINT(x)) + ((SMUQ10_FRAC(x)) >= 0x200))
59+
#define SMU_V13_SOFT_FREQ_ROUND(x) ((x) + 1)
5960

6061
extern const int pmfw_decoded_link_speed[5];
6162
extern const int pmfw_decoded_link_width[7];

‎drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,7 @@ extern const int decoded_link_width[8];
5757

5858
#define DECODE_GEN_SPEED(gen_speed_idx) (decoded_link_speed[gen_speed_idx])
5959
#define DECODE_LANE_WIDTH(lane_width_idx) (decoded_link_width[lane_width_idx])
60+
#define SMU_V14_SOFT_FREQ_ROUND(x) ((x) + 1)
6061

6162
struct smu_14_0_max_sustainable_clocks {
6263
uint32_t display_clock;

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