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| 1 | +/* |
| 2 | + * Copyright 2023 Advanced Micro Devices, Inc. |
| 3 | + * |
| 4 | + * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | + * copy of this software and associated documentation files (the "Software"), |
| 6 | + * to deal in the Software without restriction, including without limitation |
| 7 | + * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | + * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | + * Software is furnished to do so, subject to the following conditions: |
| 10 | + * |
| 11 | + * The above copyright notice and this permission notice shall be included in |
| 12 | + * all copies or substantial portions of the Software. |
| 13 | + * |
| 14 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | + * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | + * |
| 22 | + */ |
| 23 | + |
| 24 | +#ifndef SMU_V14_0_2_PPSMC_H |
| 25 | +#define SMU_V14_0_2_PPSMC_H |
| 26 | + |
| 27 | +#define PPSMC_VERSION 0x1 |
| 28 | + |
| 29 | +// SMU Response Codes: |
| 30 | +#define PPSMC_Result_OK 0x1 |
| 31 | +#define PPSMC_Result_Failed 0xFF |
| 32 | +#define PPSMC_Result_UnknownCmd 0xFE |
| 33 | +#define PPSMC_Result_CmdRejectedPrereq 0xFD |
| 34 | +#define PPSMC_Result_CmdRejectedBusy 0xFC |
| 35 | + |
| 36 | +// Message Definitions: |
| 37 | +// BASIC |
| 38 | +#define PPSMC_MSG_TestMessage 0x1 |
| 39 | +#define PPSMC_MSG_GetSmuVersion 0x2 |
| 40 | +#define PPSMC_MSG_GetDriverIfVersion 0x3 |
| 41 | +#define PPSMC_MSG_SetAllowedFeaturesMaskLow 0x4 |
| 42 | +#define PPSMC_MSG_SetAllowedFeaturesMaskHigh 0x5 |
| 43 | +#define PPSMC_MSG_EnableAllSmuFeatures 0x6 |
| 44 | +#define PPSMC_MSG_DisableAllSmuFeatures 0x7 |
| 45 | +#define PPSMC_MSG_EnableSmuFeaturesLow 0x8 |
| 46 | +#define PPSMC_MSG_EnableSmuFeaturesHigh 0x9 |
| 47 | +#define PPSMC_MSG_DisableSmuFeaturesLow 0xA |
| 48 | +#define PPSMC_MSG_DisableSmuFeaturesHigh 0xB |
| 49 | +#define PPSMC_MSG_GetRunningSmuFeaturesLow 0xC |
| 50 | +#define PPSMC_MSG_GetRunningSmuFeaturesHigh 0xD |
| 51 | +#define PPSMC_MSG_SetDriverDramAddrHigh 0xE |
| 52 | +#define PPSMC_MSG_SetDriverDramAddrLow 0xF |
| 53 | +#define PPSMC_MSG_SetToolsDramAddrHigh 0x10 |
| 54 | +#define PPSMC_MSG_SetToolsDramAddrLow 0x11 |
| 55 | +#define PPSMC_MSG_TransferTableSmu2Dram 0x12 |
| 56 | +#define PPSMC_MSG_TransferTableDram2Smu 0x13 |
| 57 | +#define PPSMC_MSG_UseDefaultPPTable 0x14 |
| 58 | + |
| 59 | +//BACO/BAMACO/BOMACO |
| 60 | +#define PPSMC_MSG_EnterBaco 0x15 |
| 61 | +#define PPSMC_MSG_ExitBaco 0x16 |
| 62 | +#define PPSMC_MSG_ArmD3 0x17 |
| 63 | +#define PPSMC_MSG_BacoAudioD3PME 0x18 |
| 64 | + |
| 65 | +//DPM |
| 66 | +#define PPSMC_MSG_SetSoftMinByFreq 0x19 |
| 67 | +#define PPSMC_MSG_SetSoftMaxByFreq 0x1A |
| 68 | +#define PPSMC_MSG_SetHardMinByFreq 0x1B |
| 69 | +#define PPSMC_MSG_SetHardMaxByFreq 0x1C |
| 70 | +#define PPSMC_MSG_GetMinDpmFreq 0x1D |
| 71 | +#define PPSMC_MSG_GetMaxDpmFreq 0x1E |
| 72 | +#define PPSMC_MSG_GetDpmFreqByIndex 0x1F |
| 73 | +#define PPSMC_MSG_OverridePcieParameters 0x20 |
| 74 | + |
| 75 | +//DramLog Set DramAddr |
| 76 | +#define PPSMC_MSG_DramLogSetDramAddrHigh 0x21 |
| 77 | +#define PPSMC_MSG_DramLogSetDramAddrLow 0x22 |
| 78 | +#define PPSMC_MSG_DramLogSetDramSize 0x23 |
| 79 | +#define PPSMC_MSG_SetWorkloadMask 0x24 |
| 80 | + |
| 81 | +#define PPSMC_MSG_GetVoltageByDpm 0x25 // Can be removed |
| 82 | +#define PPSMC_MSG_SetVideoFps 0x26 // Can be removed |
| 83 | +#define PPSMC_MSG_GetDcModeMaxDpmFreq 0x27 |
| 84 | + |
| 85 | +//Power Gating |
| 86 | +#define PPSMC_MSG_AllowGfxOff 0x28 |
| 87 | +#define PPSMC_MSG_DisallowGfxOff 0x29 |
| 88 | +#define PPSMC_MSG_PowerUpVcn 0x2A |
| 89 | +#define PPSMC_MSG_PowerDownVcn 0x2B |
| 90 | +#define PPSMC_MSG_PowerUpJpeg 0x2C |
| 91 | +#define PPSMC_MSG_PowerDownJpeg 0x2D |
| 92 | + |
| 93 | +//Resets |
| 94 | +#define PPSMC_MSG_PrepareMp1ForUnload 0x2E |
| 95 | +#define PPSMC_MSG_Mode1Reset 0x2F |
| 96 | + |
| 97 | +//Set SystemVirtual DramAddrHigh |
| 98 | +#define PPSMC_MSG_SetSystemVirtualDramAddrHigh 0x30 |
| 99 | +#define PPSMC_MSG_SetSystemVirtualDramAddrLow 0x31 |
| 100 | +//ACDC Power Source |
| 101 | +#define PPSMC_MSG_SetPptLimit 0x32 |
| 102 | +#define PPSMC_MSG_GetPptLimit 0x33 |
| 103 | +#define PPSMC_MSG_ReenableAcDcInterrupt 0x34 |
| 104 | +#define PPSMC_MSG_NotifyPowerSource 0x35 |
| 105 | + |
| 106 | +//BTC |
| 107 | +#define PPSMC_MSG_RunDcBtc 0x36 |
| 108 | + |
| 109 | +// 0x37 |
| 110 | + |
| 111 | +//Others |
| 112 | +#define PPSMC_MSG_SetTemperatureInputSelect 0x38 // Can be removed |
| 113 | +#define PPSMC_MSG_SetFwDstatesMask 0x39 |
| 114 | +#define PPSMC_MSG_SetThrottlerMask 0x3A |
| 115 | + |
| 116 | +#define PPSMC_MSG_SetExternalClientDfCstateAllow 0x3B |
| 117 | + |
| 118 | +#define PPSMC_MSG_SetMGpuFanBoostLimitRpm 0x3C |
| 119 | + |
| 120 | +//STB to dram log |
| 121 | +#define PPSMC_MSG_DumpSTBtoDram 0x3D |
| 122 | +#define PPSMC_MSG_STBtoDramLogSetDramAddrHigh 0x3E |
| 123 | +#define PPSMC_MSG_STBtoDramLogSetDramAddrLow 0x3F |
| 124 | +#define PPSMC_MSG_STBtoDramLogSetDramSize 0x40 |
| 125 | +#define PPSMC_MSG_SetOBMTraceBufferLogging 0x41 |
| 126 | + |
| 127 | +#define PPSMC_MSG_AllowGfxDcs 0x43 |
| 128 | +#define PPSMC_MSG_DisallowGfxDcs 0x44 |
| 129 | +#define PPSMC_MSG_EnableAudioStutterWA 0x45 |
| 130 | +#define PPSMC_MSG_PowerUpUmsch 0x46 |
| 131 | +#define PPSMC_MSG_PowerDownUmsch 0x47 |
| 132 | +#define PPSMC_MSG_SetDcsArch 0x48 |
| 133 | +#define PPSMC_MSG_TriggerVFFLR 0x49 |
| 134 | +#define PPSMC_MSG_SetNumBadMemoryPagesRetired 0x4A |
| 135 | +#define PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel 0x4B |
| 136 | +#define PPSMC_MSG_SetPriorityDeltaGain 0x4C |
| 137 | +#define PPSMC_MSG_AllowIHHostInterrupt 0x4D |
| 138 | +#define PPSMC_MSG_Mode3Reset 0x4F |
| 139 | +#define PPSMC_Message_Count 0x50 |
| 140 | +#endif |
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