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dt-bindings: stm32: add STM32MP21 clocks and reset bindings
Adds clock and reset binding entries for STM32MP21 SoC family. Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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‎Documentation/devicetree/bindings/clock/st,stm32mp21-rcc.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/st,stm32mp21-rcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STM32MP21 Reset Clock Controller
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maintainers:
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- Gabriel Fernandez <gabriel.fernandez@foss.st.com>
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description: |
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The RCC hardware block is both a reset and a clock controller.
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RCC makes also power management (resume/suspend).
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See also:
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include/dt-bindings/clock/st,stm32mp21-rcc.h
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include/dt-bindings/reset/st,stm32mp21-rcc.h
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properties:
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compatible:
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enum:
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- st,stm32mp21-rcc
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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clocks:
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items:
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- description: CK_SCMI_HSE High Speed External oscillator (8 to 48 MHz)
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- description: CK_SCMI_HSI High Speed Internal oscillator (~ 64 MHz)
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- description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz)
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- description: CK_SCMI_LSE Low Speed External oscillator (32 KHz)
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- description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz)
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- description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (could be gated)
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- description: CK_SCMI_ICN_HS_MCU High Speed interconnect bus clock
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- description: CK_SCMI_ICN_LS_MCU Low Speed interconnect bus clock
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- description: CK_SCMI_ICN_SDMMC SDMMC interconnect bus clock
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- description: CK_SCMI_ICN_DDR DDR interconnect bus clock
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- description: CK_SCMI_ICN_DISPLAY Display interconnect bus clock
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- description: CK_SCMI_ICN_HSL HSL interconnect bus clock
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- description: CK_SCMI_ICN_NIC NIC interconnect bus clock
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- description: CK_SCMI_FLEXGEN_07 flexgen clock 7
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- description: CK_SCMI_FLEXGEN_08 flexgen clock 8
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- description: CK_SCMI_FLEXGEN_09 flexgen clock 9
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- description: CK_SCMI_FLEXGEN_10 flexgen clock 10
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- description: CK_SCMI_FLEXGEN_11 flexgen clock 11
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- description: CK_SCMI_FLEXGEN_12 flexgen clock 12
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- description: CK_SCMI_FLEXGEN_13 flexgen clock 13
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- description: CK_SCMI_FLEXGEN_14 flexgen clock 14
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- description: CK_SCMI_FLEXGEN_16 flexgen clock 16
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- description: CK_SCMI_FLEXGEN_17 flexgen clock 17
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- description: CK_SCMI_FLEXGEN_18 flexgen clock 18
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- description: CK_SCMI_FLEXGEN_19 flexgen clock 19
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- description: CK_SCMI_FLEXGEN_20 flexgen clock 20
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- description: CK_SCMI_FLEXGEN_21 flexgen clock 21
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- description: CK_SCMI_FLEXGEN_22 flexgen clock 22
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- description: CK_SCMI_FLEXGEN_23 flexgen clock 23
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- description: CK_SCMI_FLEXGEN_24 flexgen clock 24
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- description: CK_SCMI_FLEXGEN_25 flexgen clock 25
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- description: CK_SCMI_FLEXGEN_26 flexgen clock 26
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- description: CK_SCMI_FLEXGEN_27 flexgen clock 27
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- description: CK_SCMI_FLEXGEN_29 flexgen clock 29
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- description: CK_SCMI_FLEXGEN_30 flexgen clock 30
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- description: CK_SCMI_FLEXGEN_31 flexgen clock 31
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- description: CK_SCMI_FLEXGEN_33 flexgen clock 33
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- description: CK_SCMI_FLEXGEN_36 flexgen clock 36
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- description: CK_SCMI_FLEXGEN_37 flexgen clock 37
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- description: CK_SCMI_FLEXGEN_38 flexgen clock 38
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- description: CK_SCMI_FLEXGEN_39 flexgen clock 39
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- description: CK_SCMI_FLEXGEN_40 flexgen clock 40
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- description: CK_SCMI_FLEXGEN_41 flexgen clock 41
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- description: CK_SCMI_FLEXGEN_42 flexgen clock 42
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- description: CK_SCMI_FLEXGEN_43 flexgen clock 43
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- description: CK_SCMI_FLEXGEN_44 flexgen clock 44
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- description: CK_SCMI_FLEXGEN_45 flexgen clock 45
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- description: CK_SCMI_FLEXGEN_46 flexgen clock 46
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- description: CK_SCMI_FLEXGEN_47 flexgen clock 47
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- description: CK_SCMI_FLEXGEN_48 flexgen clock 48
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- description: CK_SCMI_FLEXGEN_50 flexgen clock 50
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- description: CK_SCMI_FLEXGEN_51 flexgen clock 51
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- description: CK_SCMI_FLEXGEN_52 flexgen clock 52
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- description: CK_SCMI_FLEXGEN_53 flexgen clock 53
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- description: CK_SCMI_FLEXGEN_54 flexgen clock 54
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- description: CK_SCMI_FLEXGEN_55 flexgen clock 55
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- description: CK_SCMI_FLEXGEN_56 flexgen clock 56
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- description: CK_SCMI_FLEXGEN_57 flexgen clock 57
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- description: CK_SCMI_FLEXGEN_58 flexgen clock 58
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- description: CK_SCMI_FLEXGEN_61 flexgen clock 61
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- description: CK_SCMI_FLEXGEN_62 flexgen clock 62
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- description: CK_SCMI_FLEXGEN_63 flexgen clock 63
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- description: CK_SCMI_ICN_APB1 Peripheral bridge 1
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- description: CK_SCMI_ICN_APB2 Peripheral bridge 2
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- description: CK_SCMI_ICN_APB3 Peripheral bridge 3
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- description: CK_SCMI_ICN_APB4 Peripheral bridge 4
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- description: CK_SCMI_ICN_APB5 Peripheral bridge 5
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- description: CK_SCMI_ICN_APBDBG Peripheral bridge for debug
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- description: CK_SCMI_TIMG1 Peripheral bridge for timer1
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- description: CK_SCMI_TIMG2 Peripheral bridge for timer2
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access-controllers:
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maxItems: 1
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required:
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- compatible
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- reg
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- '#clock-cells'
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- '#reset-cells'
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/st,stm32mp21-rcc.h>
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clock-controller@44200000 {
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compatible = "st,stm32mp21-rcc";
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reg = <0x44200000 0x10000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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clocks = <&scmi_clk CK_SCMI_HSE>,
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<&scmi_clk CK_SCMI_HSI>,
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<&scmi_clk CK_SCMI_MSI>,
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<&scmi_clk CK_SCMI_LSE>,
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<&scmi_clk CK_SCMI_LSI>,
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<&scmi_clk CK_SCMI_HSE_DIV2>,
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<&scmi_clk CK_SCMI_ICN_HS_MCU>,
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<&scmi_clk CK_SCMI_ICN_LS_MCU>,
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<&scmi_clk CK_SCMI_ICN_SDMMC>,
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<&scmi_clk CK_SCMI_ICN_DDR>,
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<&scmi_clk CK_SCMI_ICN_DISPLAY>,
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<&scmi_clk CK_SCMI_ICN_HSL>,
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<&scmi_clk CK_SCMI_ICN_NIC>,
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<&scmi_clk CK_SCMI_FLEXGEN_07>,
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<&scmi_clk CK_SCMI_FLEXGEN_08>,
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<&scmi_clk CK_SCMI_FLEXGEN_09>,
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<&scmi_clk CK_SCMI_FLEXGEN_10>,
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<&scmi_clk CK_SCMI_FLEXGEN_11>,
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<&scmi_clk CK_SCMI_FLEXGEN_12>,
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<&scmi_clk CK_SCMI_FLEXGEN_13>,
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<&scmi_clk CK_SCMI_FLEXGEN_14>,
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<&scmi_clk CK_SCMI_FLEXGEN_16>,
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<&scmi_clk CK_SCMI_FLEXGEN_17>,
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<&scmi_clk CK_SCMI_FLEXGEN_18>,
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<&scmi_clk CK_SCMI_FLEXGEN_19>,
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<&scmi_clk CK_SCMI_FLEXGEN_20>,
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<&scmi_clk CK_SCMI_FLEXGEN_21>,
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<&scmi_clk CK_SCMI_FLEXGEN_22>,
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<&scmi_clk CK_SCMI_FLEXGEN_23>,
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<&scmi_clk CK_SCMI_FLEXGEN_24>,
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<&scmi_clk CK_SCMI_FLEXGEN_25>,
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<&scmi_clk CK_SCMI_FLEXGEN_26>,
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<&scmi_clk CK_SCMI_FLEXGEN_27>,
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<&scmi_clk CK_SCMI_FLEXGEN_29>,
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<&scmi_clk CK_SCMI_FLEXGEN_30>,
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<&scmi_clk CK_SCMI_FLEXGEN_31>,
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<&scmi_clk CK_SCMI_FLEXGEN_33>,
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<&scmi_clk CK_SCMI_FLEXGEN_36>,
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<&scmi_clk CK_SCMI_FLEXGEN_37>,
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<&scmi_clk CK_SCMI_FLEXGEN_38>,
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<&scmi_clk CK_SCMI_FLEXGEN_39>,
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<&scmi_clk CK_SCMI_FLEXGEN_40>,
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<&scmi_clk CK_SCMI_FLEXGEN_41>,
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<&scmi_clk CK_SCMI_FLEXGEN_42>,
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<&scmi_clk CK_SCMI_FLEXGEN_43>,
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<&scmi_clk CK_SCMI_FLEXGEN_44>,
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<&scmi_clk CK_SCMI_FLEXGEN_45>,
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<&scmi_clk CK_SCMI_FLEXGEN_46>,
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<&scmi_clk CK_SCMI_FLEXGEN_47>,
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<&scmi_clk CK_SCMI_FLEXGEN_48>,
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<&scmi_clk CK_SCMI_FLEXGEN_50>,
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<&scmi_clk CK_SCMI_FLEXGEN_51>,
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<&scmi_clk CK_SCMI_FLEXGEN_52>,
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<&scmi_clk CK_SCMI_FLEXGEN_53>,
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<&scmi_clk CK_SCMI_FLEXGEN_54>,
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<&scmi_clk CK_SCMI_FLEXGEN_55>,
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<&scmi_clk CK_SCMI_FLEXGEN_56>,
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<&scmi_clk CK_SCMI_FLEXGEN_57>,
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<&scmi_clk CK_SCMI_FLEXGEN_58>,
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<&scmi_clk CK_SCMI_FLEXGEN_61>,
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<&scmi_clk CK_SCMI_FLEXGEN_62>,
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<&scmi_clk CK_SCMI_FLEXGEN_63>,
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<&scmi_clk CK_SCMI_ICN_APB1>,
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<&scmi_clk CK_SCMI_ICN_APB2>,
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<&scmi_clk CK_SCMI_ICN_APB3>,
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<&scmi_clk CK_SCMI_ICN_APB4>,
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<&scmi_clk CK_SCMI_ICN_APB5>,
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<&scmi_clk CK_SCMI_ICN_APBDBG>,
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<&scmi_clk CK_SCMI_TIMG1>,
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<&scmi_clk CK_SCMI_TIMG2>;
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};
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...

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