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airliedairlied
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Merge tag 'amd-drm-fixes-6.17-2025-08-28' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes
amd-drm-fixes-6.17-2025-08-28: amdgpu: - UserQ fixes - Revert CSA fix - SR-IOV fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://lore.kernel.org/r/20250828173904.75850-1-alexander.deucher@amd.com
2 parents 60d98e1 + c767d74 commit 4b1c24e

5 files changed

Lines changed: 28 additions & 17 deletions

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‎drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -88,8 +88,8 @@ int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
8888
}
8989

9090
r = amdgpu_vm_bo_map(adev, *bo_va, csa_addr, 0, size,
91-
AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE |
92-
AMDGPU_VM_PAGE_EXECUTABLE);
91+
AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE |
92+
AMDGPU_PTE_EXECUTABLE);
9393

9494
if (r) {
9595
DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -471,6 +471,7 @@ amdgpu_userq_create(struct drm_file *filp, union drm_amdgpu_userq *args)
471471
if (index == (uint64_t)-EINVAL) {
472472
drm_file_err(uq_mgr->file, "Failed to get doorbell for queue\n");
473473
kfree(queue);
474+
r = -EINVAL;
474475
goto unlock;
475476
}
476477

‎drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c‎

Lines changed: 9 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1612,9 +1612,9 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
16121612
case IP_VERSION(11, 0, 2):
16131613
case IP_VERSION(11, 0, 3):
16141614
if (!adev->gfx.disable_uq &&
1615-
adev->gfx.me_fw_version >= 2390 &&
1616-
adev->gfx.pfp_fw_version >= 2530 &&
1617-
adev->gfx.mec_fw_version >= 2600 &&
1615+
adev->gfx.me_fw_version >= 2420 &&
1616+
adev->gfx.pfp_fw_version >= 2580 &&
1617+
adev->gfx.mec_fw_version >= 2650 &&
16181618
adev->mes.fw_version[0] >= 120) {
16191619
adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs;
16201620
adev->userq_funcs[AMDGPU_HW_IP_COMPUTE] = &userq_mes_funcs;
@@ -4129,6 +4129,8 @@ static int gfx_v11_0_gfx_mqd_init(struct amdgpu_device *adev, void *m,
41294129
#endif
41304130
if (prop->tmz_queue)
41314131
tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, TMZ_MATCH, 1);
4132+
if (!prop->kernel_queue)
4133+
tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_NON_PRIV, 1);
41324134
mqd->cp_gfx_hqd_cntl = tmp;
41334135

41344136
/* set up cp_doorbell_control */
@@ -4281,8 +4283,10 @@ static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
42814283
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 1);
42824284
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH,
42834285
prop->allow_tunneling);
4284-
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
4285-
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);
4286+
if (prop->kernel_queue) {
4287+
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
4288+
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);
4289+
}
42864290
if (prop->tmz_queue)
42874291
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TMZ, 1);
42884292
mqd->cp_hqd_pq_control = tmp;

‎drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3026,6 +3026,8 @@ static int gfx_v12_0_gfx_mqd_init(struct amdgpu_device *adev, void *m,
30263026
#endif
30273027
if (prop->tmz_queue)
30283028
tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, TMZ_MATCH, 1);
3029+
if (!prop->kernel_queue)
3030+
tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_NON_PRIV, 1);
30293031
mqd->cp_gfx_hqd_cntl = tmp;
30303032

30313033
/* set up cp_doorbell_control */
@@ -3175,8 +3177,10 @@ static int gfx_v12_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
31753177
(order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));
31763178
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 1);
31773179
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH, 0);
3178-
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
3179-
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);
3180+
if (prop->kernel_queue) {
3181+
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
3182+
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);
3183+
}
31803184
if (prop->tmz_queue)
31813185
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TMZ, 1);
31823186
mqd->cp_hqd_pq_control = tmp;

‎drivers/gpu/drm/amd/pm/amdgpu_pm.c‎

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -3458,14 +3458,16 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
34583458
effective_mode &= ~S_IWUSR;
34593459

34603460
/* not implemented yet for APUs other than GC 10.3.1 (vangogh) and 9.4.3 */
3461-
if (((adev->family == AMDGPU_FAMILY_SI) ||
3462-
((adev->flags & AMD_IS_APU) && (gc_ver != IP_VERSION(10, 3, 1)) &&
3463-
(gc_ver != IP_VERSION(9, 4, 3) && gc_ver != IP_VERSION(9, 4, 4)))) &&
3464-
(attr == &sensor_dev_attr_power1_cap_max.dev_attr.attr ||
3465-
attr == &sensor_dev_attr_power1_cap_min.dev_attr.attr ||
3466-
attr == &sensor_dev_attr_power1_cap.dev_attr.attr ||
3467-
attr == &sensor_dev_attr_power1_cap_default.dev_attr.attr))
3468-
return 0;
3461+
if (attr == &sensor_dev_attr_power1_cap_max.dev_attr.attr ||
3462+
attr == &sensor_dev_attr_power1_cap_min.dev_attr.attr ||
3463+
attr == &sensor_dev_attr_power1_cap.dev_attr.attr ||
3464+
attr == &sensor_dev_attr_power1_cap_default.dev_attr.attr) {
3465+
if (adev->family == AMDGPU_FAMILY_SI ||
3466+
((adev->flags & AMD_IS_APU) && gc_ver != IP_VERSION(10, 3, 1) &&
3467+
(gc_ver != IP_VERSION(9, 4, 3) && gc_ver != IP_VERSION(9, 4, 4))) ||
3468+
(amdgpu_sriov_vf(adev) && gc_ver == IP_VERSION(11, 0, 3)))
3469+
return 0;
3470+
}
34693471

34703472
/* not implemented yet for APUs having < GC 9.3.0 (Renoir) */
34713473
if (((adev->family == AMDGPU_FAMILY_SI) ||

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