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Bartosz Golaszewski
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gpio: aspeed: use lock guards
Reduce the code complexity by using automatic lock guards with the raw spinlock. Link: https://lore.kernel.org/r/20250303-gpiochip-set-conversion-v1-12-1d5cceeebf8b@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
1 parent 74ab452 commit 4cdc191

1 file changed

Lines changed: 38 additions & 63 deletions

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‎drivers/gpio/gpio-aspeed.c‎

Lines changed: 38 additions & 63 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55
* Joel Stanley <joel@jms.id.au>
66
*/
77

8+
#include <linux/cleanup.h>
89
#include <linux/clk.h>
910
#include <linux/gpio/aspeed.h>
1011
#include <linux/gpio/driver.h>
@@ -427,67 +428,60 @@ static void aspeed_gpio_set(struct gpio_chip *gc, unsigned int offset,
427428
int val)
428429
{
429430
struct aspeed_gpio *gpio = gpiochip_get_data(gc);
430-
unsigned long flags;
431431
bool copro = false;
432432

433-
raw_spin_lock_irqsave(&gpio->lock, flags);
433+
guard(raw_spinlock_irqsave)(&gpio->lock);
434+
434435
copro = aspeed_gpio_copro_request(gpio, offset);
435436

436437
__aspeed_gpio_set(gc, offset, val);
437438

438439
if (copro)
439440
aspeed_gpio_copro_release(gpio, offset);
440-
raw_spin_unlock_irqrestore(&gpio->lock, flags);
441441
}
442442

443443
static int aspeed_gpio_dir_in(struct gpio_chip *gc, unsigned int offset)
444444
{
445445
struct aspeed_gpio *gpio = gpiochip_get_data(gc);
446-
unsigned long flags;
447446
bool copro = false;
448447

449448
if (!have_input(gpio, offset))
450449
return -ENOTSUPP;
451450

452-
raw_spin_lock_irqsave(&gpio->lock, flags);
451+
guard(raw_spinlock_irqsave)(&gpio->lock);
453452

454453
copro = aspeed_gpio_copro_request(gpio, offset);
455454
gpio->config->llops->reg_bit_set(gpio, offset, reg_dir, 0);
456455
if (copro)
457456
aspeed_gpio_copro_release(gpio, offset);
458457

459-
raw_spin_unlock_irqrestore(&gpio->lock, flags);
460-
461458
return 0;
462459
}
463460

464461
static int aspeed_gpio_dir_out(struct gpio_chip *gc,
465462
unsigned int offset, int val)
466463
{
467464
struct aspeed_gpio *gpio = gpiochip_get_data(gc);
468-
unsigned long flags;
469465
bool copro = false;
470466

471467
if (!have_output(gpio, offset))
472468
return -ENOTSUPP;
473469

474-
raw_spin_lock_irqsave(&gpio->lock, flags);
470+
guard(raw_spinlock_irqsave)(&gpio->lock);
475471

476472
copro = aspeed_gpio_copro_request(gpio, offset);
477473
__aspeed_gpio_set(gc, offset, val);
478474
gpio->config->llops->reg_bit_set(gpio, offset, reg_dir, 1);
479475

480476
if (copro)
481477
aspeed_gpio_copro_release(gpio, offset);
482-
raw_spin_unlock_irqrestore(&gpio->lock, flags);
483478

484479
return 0;
485480
}
486481

487482
static int aspeed_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
488483
{
489484
struct aspeed_gpio *gpio = gpiochip_get_data(gc);
490-
unsigned long flags;
491485
u32 val;
492486

493487
if (!have_input(gpio, offset))
@@ -496,12 +490,10 @@ static int aspeed_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
496490
if (!have_output(gpio, offset))
497491
return GPIO_LINE_DIRECTION_IN;
498492

499-
raw_spin_lock_irqsave(&gpio->lock, flags);
493+
guard(raw_spinlock_irqsave)(&gpio->lock);
500494

501495
val = gpio->config->llops->reg_bit_get(gpio, offset, reg_dir);
502496

503-
raw_spin_unlock_irqrestore(&gpio->lock, flags);
504-
505497
return val ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
506498
}
507499

@@ -527,28 +519,26 @@ static inline int irqd_to_aspeed_gpio_data(struct irq_data *d,
527519
static void aspeed_gpio_irq_ack(struct irq_data *d)
528520
{
529521
struct aspeed_gpio *gpio;
530-
unsigned long flags;
531522
int rc, offset;
532523
bool copro = false;
533524

534525
rc = irqd_to_aspeed_gpio_data(d, &gpio, &offset);
535526
if (rc)
536527
return;
537528

538-
raw_spin_lock_irqsave(&gpio->lock, flags);
529+
guard(raw_spinlock_irqsave)(&gpio->lock);
530+
539531
copro = aspeed_gpio_copro_request(gpio, offset);
540532

541533
gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_status, 1);
542534

543535
if (copro)
544536
aspeed_gpio_copro_release(gpio, offset);
545-
raw_spin_unlock_irqrestore(&gpio->lock, flags);
546537
}
547538

548539
static void aspeed_gpio_irq_set_mask(struct irq_data *d, bool set)
549540
{
550541
struct aspeed_gpio *gpio;
551-
unsigned long flags;
552542
int rc, offset;
553543
bool copro = false;
554544

@@ -560,14 +550,14 @@ static void aspeed_gpio_irq_set_mask(struct irq_data *d, bool set)
560550
if (set)
561551
gpiochip_enable_irq(&gpio->chip, irqd_to_hwirq(d));
562552

563-
raw_spin_lock_irqsave(&gpio->lock, flags);
553+
guard(raw_spinlock_irqsave)(&gpio->lock);
554+
564555
copro = aspeed_gpio_copro_request(gpio, offset);
565556

566557
gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_enable, set);
567558

568559
if (copro)
569560
aspeed_gpio_copro_release(gpio, offset);
570-
raw_spin_unlock_irqrestore(&gpio->lock, flags);
571561

572562
/* Masking the IRQ */
573563
if (!set)
@@ -591,7 +581,6 @@ static int aspeed_gpio_set_type(struct irq_data *d, unsigned int type)
591581
u32 type2 = 0;
592582
irq_flow_handler_t handler;
593583
struct aspeed_gpio *gpio;
594-
unsigned long flags;
595584
int rc, offset;
596585
bool copro = false;
597586

@@ -620,16 +609,19 @@ static int aspeed_gpio_set_type(struct irq_data *d, unsigned int type)
620609
return -EINVAL;
621610
}
622611

623-
raw_spin_lock_irqsave(&gpio->lock, flags);
624-
copro = aspeed_gpio_copro_request(gpio, offset);
612+
scoped_guard(raw_spinlock_irqsave, &gpio->lock) {
613+
copro = aspeed_gpio_copro_request(gpio, offset);
625614

626-
gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type0, type0);
627-
gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type1, type1);
628-
gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type2, type2);
615+
gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type0,
616+
type0);
617+
gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type1,
618+
type1);
619+
gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type2,
620+
type2);
629621

630-
if (copro)
631-
aspeed_gpio_copro_release(gpio, offset);
632-
raw_spin_unlock_irqrestore(&gpio->lock, flags);
622+
if (copro)
623+
aspeed_gpio_copro_release(gpio, offset);
624+
}
633625

634626
irq_set_handler_locked(d, handler);
635627

@@ -686,17 +678,16 @@ static int aspeed_gpio_reset_tolerance(struct gpio_chip *chip,
686678
unsigned int offset, bool enable)
687679
{
688680
struct aspeed_gpio *gpio = gpiochip_get_data(chip);
689-
unsigned long flags;
690681
bool copro = false;
691682

692-
raw_spin_lock_irqsave(&gpio->lock, flags);
683+
guard(raw_spinlock_irqsave)(&gpio->lock);
684+
693685
copro = aspeed_gpio_copro_request(gpio, offset);
694686

695687
gpio->config->llops->reg_bit_set(gpio, offset, reg_tolerance, enable);
696688

697689
if (copro)
698690
aspeed_gpio_copro_release(gpio, offset);
699-
raw_spin_unlock_irqrestore(&gpio->lock, flags);
700691

701692
return 0;
702693
}
@@ -798,7 +789,6 @@ static int enable_debounce(struct gpio_chip *chip, unsigned int offset,
798789
{
799790
struct aspeed_gpio *gpio = gpiochip_get_data(chip);
800791
u32 requested_cycles;
801-
unsigned long flags;
802792
int rc;
803793
int i;
804794

@@ -812,12 +802,12 @@ static int enable_debounce(struct gpio_chip *chip, unsigned int offset,
812802
return rc;
813803
}
814804

815-
raw_spin_lock_irqsave(&gpio->lock, flags);
805+
guard(raw_spinlock_irqsave)(&gpio->lock);
816806

817807
if (timer_allocation_registered(gpio, offset)) {
818808
rc = unregister_allocated_timer(gpio, offset);
819809
if (rc < 0)
820-
goto out;
810+
return rc;
821811
}
822812

823813
/* Try to find a timer already configured for the debounce period */
@@ -855,42 +845,34 @@ static int enable_debounce(struct gpio_chip *chip, unsigned int offset,
855845
* consistency.
856846
*/
857847
configure_timer(gpio, offset, 0);
858-
goto out;
848+
return rc;
859849
}
860850

861851
i = j;
862852

863853
iowrite32(requested_cycles, gpio->base + gpio->config->debounce_timers_array[i]);
864854
}
865855

866-
if (WARN(i == 0, "Cannot register index of disabled timer\n")) {
867-
rc = -EINVAL;
868-
goto out;
869-
}
856+
if (WARN(i == 0, "Cannot register index of disabled timer\n"))
857+
return -EINVAL;
870858

871859
register_allocated_timer(gpio, offset, i);
872860
configure_timer(gpio, offset, i);
873861

874-
out:
875-
raw_spin_unlock_irqrestore(&gpio->lock, flags);
876-
877862
return rc;
878863
}
879864

880865
static int disable_debounce(struct gpio_chip *chip, unsigned int offset)
881866
{
882867
struct aspeed_gpio *gpio = gpiochip_get_data(chip);
883-
unsigned long flags;
884868
int rc;
885869

886-
raw_spin_lock_irqsave(&gpio->lock, flags);
870+
guard(raw_spinlock_irqsave)(&gpio->lock);
887871

888872
rc = unregister_allocated_timer(gpio, offset);
889873
if (!rc)
890874
configure_timer(gpio, offset, 0);
891875

892-
raw_spin_unlock_irqrestore(&gpio->lock, flags);
893-
894876
return rc;
895877
}
896878

@@ -961,7 +943,6 @@ int aspeed_gpio_copro_grab_gpio(struct gpio_desc *desc,
961943
struct aspeed_gpio *gpio = gpiochip_get_data(chip);
962944
int rc = 0, bindex, offset = gpio_chip_hwgpio(desc);
963945
const struct aspeed_gpio_bank *bank = to_bank(offset);
964-
unsigned long flags;
965946

966947
if (!aspeed_gpio_support_copro(gpio))
967948
return -EOPNOTSUPP;
@@ -974,13 +955,12 @@ int aspeed_gpio_copro_grab_gpio(struct gpio_desc *desc,
974955
return -EINVAL;
975956
bindex = offset >> 3;
976957

977-
raw_spin_lock_irqsave(&gpio->lock, flags);
958+
guard(raw_spinlock_irqsave)(&gpio->lock);
978959

979960
/* Sanity check, this shouldn't happen */
980-
if (gpio->cf_copro_bankmap[bindex] == 0xff) {
981-
rc = -EIO;
982-
goto bail;
983-
}
961+
if (gpio->cf_copro_bankmap[bindex] == 0xff)
962+
return -EIO;
963+
984964
gpio->cf_copro_bankmap[bindex]++;
985965

986966
/* Switch command source */
@@ -994,8 +974,6 @@ int aspeed_gpio_copro_grab_gpio(struct gpio_desc *desc,
994974
*dreg_offset = bank->rdata_reg;
995975
if (bit)
996976
*bit = GPIO_OFFSET(offset);
997-
bail:
998-
raw_spin_unlock_irqrestore(&gpio->lock, flags);
999977
return rc;
1000978
}
1001979
EXPORT_SYMBOL_GPL(aspeed_gpio_copro_grab_gpio);
@@ -1009,7 +987,6 @@ int aspeed_gpio_copro_release_gpio(struct gpio_desc *desc)
1009987
struct gpio_chip *chip = gpiod_to_chip(desc);
1010988
struct aspeed_gpio *gpio = gpiochip_get_data(chip);
1011989
int rc = 0, bindex, offset = gpio_chip_hwgpio(desc);
1012-
unsigned long flags;
1013990

1014991
if (!aspeed_gpio_support_copro(gpio))
1015992
return -EOPNOTSUPP;
@@ -1021,21 +998,19 @@ int aspeed_gpio_copro_release_gpio(struct gpio_desc *desc)
1021998
return -EINVAL;
1022999
bindex = offset >> 3;
10231000

1024-
raw_spin_lock_irqsave(&gpio->lock, flags);
1001+
guard(raw_spinlock_irqsave)(&gpio->lock);
10251002

10261003
/* Sanity check, this shouldn't happen */
1027-
if (gpio->cf_copro_bankmap[bindex] == 0) {
1028-
rc = -EIO;
1029-
goto bail;
1030-
}
1004+
if (gpio->cf_copro_bankmap[bindex] == 0)
1005+
return -EIO;
1006+
10311007
gpio->cf_copro_bankmap[bindex]--;
10321008

10331009
/* Switch command source */
10341010
if (gpio->cf_copro_bankmap[bindex] == 0)
10351011
aspeed_gpio_change_cmd_source(gpio, offset,
10361012
GPIO_CMDSRC_ARM);
1037-
bail:
1038-
raw_spin_unlock_irqrestore(&gpio->lock, flags);
1013+
10391014
return rc;
10401015
}
10411016
EXPORT_SYMBOL_GPL(aspeed_gpio_copro_release_gpio);

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