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jannaujannau
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arm64: dts: apple: t6022-j180d: Add node for built-in PCIe devices
Currently only the two ethernet controllers and the SATA-AHCI are detected. The USB controller (internal USB-A port and USB-A ports on the I/O board) are missing code to toggle the reset gpio pin. The Broadcom Wlan/BT device needs in addition the SMC power enable GPIO. The "bluetooth0" and "wifi0" aliases can not be added since the ADT misses calibration data for Wlan and BT. Signed-off-by: Janne Grunau <j@jannau.net>
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Lines changed: 331 additions & 4 deletions

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‎arch/arm64/boot/dts/apple/t6022-j180d.dts‎

Lines changed: 331 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -24,12 +24,12 @@
2424
atcphy5 = &atcphy1_die1;
2525
atcphy6 = &atcphy2_die1;
2626
atcphy7 = &atcphy3_die1;
27-
//bluetooth0 = &bluetooth0;
28-
//ethernet0 = &ethernet0;
29-
//ethernet1 = &ethernet1;
27+
bluetooth0 = &bluetooth0;
28+
ethernet0 = &ethernet0;
29+
ethernet1 = &ethernet1;
3030
nvram = &nvram;
3131
serial0 = &serial0;
32-
//wifi0 = &wifi0;
32+
wifi0 = &wifi0;
3333
};
3434

3535
chosen {
@@ -455,6 +455,333 @@
455455
};
456456
};
457457

458+
/* PCIe devices */
459+
&port_ge00 {
460+
bus-range = <0x01 0x09>;
461+
462+
pci@0,0 {
463+
// compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
464+
device_type = "pci";
465+
reg = <0x10000 0x00 0x00 0x00 0x00>;
466+
bus-range = <0x02 0x07>;
467+
468+
#address-cells = <0x03>;
469+
#size-cells = <0x02>;
470+
ranges = <0x82010000 0x00 0x80000000 0x82010000 0x00 0x80000000 0x00 0x500000>,
471+
<0xc3010000 0x18 0x00000000 0xc3010000 0x18 0x00000000 0x00 0x500000>;
472+
473+
#interrupt-cells = <0x01>;
474+
interrupt-map-mask = <0xffff00 0x00 0x00 0x07>;
475+
interrupt-map = <0x20000 0x00 0x00 0x01 &port_ge00 0x00 0x00 0x00 0x00>,
476+
<0x20000 0x00 0x00 0x02 &port_ge00 0x00 0x00 0x00 0x01>,
477+
<0x20000 0x00 0x00 0x03 &port_ge00 0x00 0x00 0x00 0x02>,
478+
<0x20000 0x00 0x00 0x04 &port_ge00 0x00 0x00 0x00 0x03>,
479+
<0x20800 0x00 0x00 0x01 &port_ge00 0x00 0x00 0x00 0x01>,
480+
<0x20800 0x00 0x00 0x02 &port_ge00 0x00 0x00 0x00 0x02>,
481+
<0x20800 0x00 0x00 0x03 &port_ge00 0x00 0x00 0x00 0x03>,
482+
<0x20800 0x00 0x00 0x04 &port_ge00 0x00 0x00 0x00 0x00>,
483+
<0x21000 0x00 0x00 0x01 &port_ge00 0x00 0x00 0x00 0x02>,
484+
<0x21000 0x00 0x00 0x02 &port_ge00 0x00 0x00 0x00 0x03>,
485+
<0x21000 0x00 0x00 0x03 &port_ge00 0x00 0x00 0x00 0x00>,
486+
<0x21000 0x00 0x00 0x04 &port_ge00 0x00 0x00 0x00 0x01>,
487+
<0x21800 0x00 0x00 0x01 &port_ge00 0x00 0x00 0x00 0x03>,
488+
<0x21800 0x00 0x00 0x02 &port_ge00 0x00 0x00 0x00 0x00>,
489+
<0x21800 0x00 0x00 0x03 &port_ge00 0x00 0x00 0x00 0x01>,
490+
<0x21800 0x00 0x00 0x04 &port_ge00 0x00 0x00 0x00 0x02>,
491+
<0x22000 0x00 0x00 0x01 &port_ge00 0x00 0x00 0x00 0x00>,
492+
<0x22000 0x00 0x00 0x02 &port_ge00 0x00 0x00 0x00 0x01>,
493+
<0x22000 0x00 0x00 0x03 &port_ge00 0x00 0x00 0x00 0x02>,
494+
<0x22000 0x00 0x00 0x04 &port_ge00 0x00 0x00 0x00 0x03>;
495+
496+
/* pci-slot1-dsp, PCIe slot-1 */
497+
pci@0,0 {
498+
compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
499+
device_type = "pci";
500+
reg = <0x20000 0x00 0x00 0x00 0x00>;
501+
bus-range = <0x03 0x03>;
502+
503+
#address-cells = <0x03>;
504+
#size-cells = <0x02>;
505+
ranges;
506+
};
507+
508+
/* pci-slot2-dsp, PCIe slot-2 */
509+
pci@1,0 {
510+
compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
511+
device_type = "pci";
512+
reg = <0x20800 0x00 0x00 0x00 0x00>;
513+
bus-range = <0x04 0x04>;
514+
515+
#address-cells = <0x03>;
516+
#size-cells = <0x02>;
517+
ranges;
518+
};
519+
520+
/* pci-slot3-dsp, PCIe slot-3 */
521+
pci@2,0 {
522+
compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
523+
device_type = "pci";
524+
reg = <0x21000 0x00 0x00 0x00 0x00>;
525+
bus-range = <0x05 0x05>;
526+
527+
#address-cells = <0x03>;
528+
#size-cells = <0x02>;
529+
ranges;
530+
};
531+
532+
/* pci-slot4-dsp, PCIe slot-4 */
533+
pci@3,0 {
534+
compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
535+
device_type = "pci";
536+
reg = <0x21800 0x00 0x00 0x00 0x00>;
537+
bus-range = <0x06 0x06>;
538+
539+
#address-cells = <0x03>;
540+
#size-cells = <0x02>;
541+
ranges;
542+
};
543+
544+
/* pci-slot5-dsp, PCIe slot-5 */
545+
pci@4,0 {
546+
compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
547+
device_type = "pci";
548+
reg = <0x22000 0x00 0x00 0x00 0x00>;
549+
bus-range = <0x07 0x07>;
550+
551+
#address-cells = <0x03>;
552+
#size-cells = <0x02>;
553+
ranges;
554+
};
555+
556+
};
557+
};
558+
559+
&port_ge00_die1 {
560+
bus-range = <0x01 0x09>;
561+
562+
/*
563+
* Add mulptiple "reset-gpios" since there is no mechanismen to access
564+
* PERST# for devices behind the PCIe switch.
565+
* The "pwren" GPIO is from the wifi/bt chip which faces the same
566+
* problem without pci-pwrctrl integration.
567+
*/
568+
reset-gpios = <&pinctrl_ap 4 GPIO_ACTIVE_LOW>,
569+
<&pinctrl_ap 6 GPIO_ACTIVE_LOW>,
570+
<&pinctrl_ap 7 GPIO_ACTIVE_LOW>,
571+
<&pinctrl_ap_die1 9 GPIO_ACTIVE_LOW>;
572+
pwren-gpios = <&smc_gpio 13 GPIO_ACTIVE_HIGH>;
573+
574+
pci@0,0 {
575+
device_type = "pci";
576+
reg = <0x10000 0x00 0x00 0x00 0x00>;
577+
bus-range = <0x02 0x09>;
578+
579+
#address-cells = <3>;
580+
#size-cells = <2>;
581+
ranges;
582+
583+
interrupt-controller;
584+
#interrupt-cells = <1>;
585+
interrupt-map-mask = <0xffff00 0x00 0x00 0x07>;
586+
interrupt-map = <0x20000 0x00 0x00 0x01 &port_ge00_die1 0x00 0x00 0x00 0x00>,
587+
<0x20000 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x01>,
588+
<0x20000 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x02>,
589+
<0x20000 0x00 0x00 0x04 &port_ge00_die1 0x00 0x00 0x00 0x03>,
590+
<0x20800 0x00 0x00 0x01 &port_ge00_die1 0x00 0x00 0x00 0x01>,
591+
<0x20800 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x02>,
592+
<0x20800 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x03>,
593+
<0x20800 0x00 0x00 0x04 &port_ge00_die1 0x00 0x00 0x00 0x00>,
594+
<0x21000 0x00 0x00 0x01 &port_ge00_die1 0x00 0x00 0x00 0x02>,
595+
<0x21000 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x03>,
596+
<0x21000 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x00>,
597+
<0x21000 0x00 0x00 0x04 &port_ge00_die1 0x00 0x00 0x00 0x01>,
598+
<0x21800 0x00 0x00 0x01 &port_ge00_die1 0x00 0x00 0x00 0x03>,
599+
<0x21800 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x00>,
600+
<0x21800 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x01>,
601+
<0x21800 0x00 0x00 0x04 &port_ge00_die1 0x00 0x00 0x00 0x02>,
602+
<0x22000 0x00 0x00 0x01 &port_ge00_die1 0x00 0x00 0x00 0x00>,
603+
<0x22000 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x01>,
604+
<0x22000 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x02>,
605+
<0x22000 0x00 0x00 0x04 &port_ge00_die1 0x00 0x00 0x00 0x03>,
606+
<0x22800 0x00 0x00 0x01 &port_ge00_die1 0x00 0x00 0x00 0x01>,
607+
<0x22800 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x02>,
608+
<0x22800 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x03>,
609+
<0x22800 0x00 0x00 0x04 &port_ge00_die1 0x00 0x00 0x00 0x00>,
610+
<0x23000 0x00 0x00 0x01 &port_ge00_die1 0x00 0x00 0x00 0x02>,
611+
<0x23000 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x03>,
612+
<0x23000 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x00>,
613+
<0x23000 0x00 0x00 0x04 &port_ge00_die1 0x00 0x00 0x00 0x01>;
614+
615+
/* pci-usba-dsp, internal USB-A port */
616+
pci@0,0 {
617+
compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
618+
device_type = "pci";
619+
reg = <0x20000 0x00 0x00 0x00 0x00>;
620+
bus-range = <0x03 0x03>;
621+
622+
#address-cells = <3>;
623+
#size-cells = <2>;
624+
ranges;
625+
626+
interrupt-controller;
627+
#interrupt-cells = <1>;
628+
interrupt-map-mask = <0 0 0 7>;
629+
interrupt-map = <0x30000 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x00>,
630+
<0x30000 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x01>,
631+
<0x30000 0x00 0x00 0x04 &port_ge00_die1 0x00 0x00 0x00 0x02>;
632+
633+
/* temporarily handled in the root port */
634+
// reset-gpios = <&pinctrl_ap 6 GPIO_ACTIVE_LOW>;
635+
};
636+
637+
/* pci-sata-dsp, internal AHCI controller */
638+
pci@1,0 {
639+
compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
640+
device_type = "pci";
641+
reg = <0x20800 0x00 0x00 0x00 0x00>;
642+
bus-range = <0x04 0x04>;
643+
644+
#address-cells = <3>;
645+
#size-cells = <2>;
646+
ranges;
647+
648+
interrupt-controller;
649+
#interrupt-cells = <1>;
650+
interrupt-map-mask = <0 0 0 7>;
651+
interrupt-map = <0x40000 0x00 0x00 0x01 &port_ge00_die1 0x00 0x00 0x00 0x00>,
652+
<0x40000 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x01>,
653+
<0x40000 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x02>;
654+
};
655+
656+
/* pci-bio-dsp, I/O board USB-A ports */
657+
pci@2,0 {
658+
compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
659+
device_type = "pci";
660+
reg = <0x21000 0x00 0x00 0x00 0x00>;
661+
bus-range = <0x05 0x05>;
662+
663+
#address-cells = <3>;
664+
#size-cells = <2>;
665+
ranges;
666+
667+
interrupt-controller;
668+
#interrupt-cells = <1>;
669+
interrupt-map-mask = <0 0 0 7>;
670+
interrupt-map = <0x50000 0x00 0x00 0x01 &port_ge00_die1 0x00 0x00 0x00 0x01>,
671+
<0x50000 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x02>,
672+
<0x50000 0x00 0x00 0x04 &port_ge00_die1 0x00 0x00 0x00 0x00>;
673+
674+
/* temporarily handled in the root port */
675+
// reset-gpios = <&pinctrl_ap 7 GPIO_ACTIVE_LOW>;
676+
};
677+
678+
/* pci-lan-dsp, Qtion AQC113 10G etherner controller (0) */
679+
pci@3,0 {
680+
compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
681+
device_type = "pci";
682+
reg = <0x21800 0x00 0x00 0x00 0x00>;
683+
bus-range = <0x06 0x06>;
684+
685+
#address-cells = <3>;
686+
#size-cells = <2>;
687+
ranges;
688+
689+
interrupt-controller;
690+
#interrupt-cells = <1>;
691+
interrupt-map-mask = <0 0 0 7>;
692+
interrupt-map = <0x60000 0x00 0x00 0x01 &port_ge00_die1 0x00 0x00 0x00 0x02>,
693+
<0x60000 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x00>,
694+
<0x60000 0x00 0x00 0x04 &port_ge00_die1 0x00 0x00 0x00 0x01>;
695+
696+
ethernet0: ethernet@0,0 {
697+
reg = <0x60000 0x0 0x0 0x0 0x0>;
698+
/* To be filled by the loader */
699+
local-mac-address = [00 10 18 00 00 00];
700+
};
701+
};
702+
703+
/* pci-lan-b-dsp, Qtion AQC113 10G etherner controller (1) */
704+
pci@4,0 {
705+
compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
706+
device_type = "pci";
707+
reg = <0x22000 0x00 0x00 0x00 0x00>;
708+
bus-range = <0x07 0x07>;
709+
710+
#address-cells = <3>;
711+
#size-cells = <2>;
712+
ranges;
713+
714+
interrupt-controller;
715+
#interrupt-cells = <1>;
716+
interrupt-map-mask = <0 0 0 7>;
717+
interrupt-map = <0x70000 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x00>,
718+
<0x70000 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x01>,
719+
<0x70000 0x00 0x00 0x04 &port_ge00_die1 0x00 0x00 0x00 0x02>;
720+
721+
ethernet1: ethernet@0,0 {
722+
reg = <0x70000 0x0 0x0 0x0 0x0>;
723+
/* To be filled by the loader */
724+
local-mac-address = [00 10 18 00 00 00];
725+
};
726+
};
727+
728+
/* pci-wifibt-dsp, Broadcom BCM4388 Wlan/BT */
729+
pci@5,0 {
730+
compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
731+
device_type = "pci";
732+
reg = <0x22800 0x00 0x00 0x00 0x00>;
733+
bus-range = <0x08 0x08>;
734+
735+
#address-cells = <3>;
736+
#size-cells = <2>;
737+
ranges;
738+
739+
interrupt-controller;
740+
#interrupt-cells = <1>;
741+
interrupt-map-mask = <0 0 0 7>;
742+
interrupt-map = <0x80000 0x00 0x00 0x01 &port_ge00_die1 0x00 0x00 0x00 0x00>,
743+
<0x80000 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x01>,
744+
<0x80000 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x02>,
745+
<0x80100 0x00 0x00 0x01 &port_ge00_die1 0x00 0x00 0x00 0x00>,
746+
<0x80100 0x00 0x00 0x02 &port_ge00_die1 0x00 0x00 0x00 0x01>,
747+
<0x80100 0x00 0x00 0x03 &port_ge00_die1 0x00 0x00 0x00 0x02>;
748+
749+
/* temporarily handled in the root port */
750+
// reset-gpios = <&pinctrl_ap 4 GPIO_ACTIVE_LOW>;
751+
// pwren-gpios = <&smc_gpio 13 GPIO_ACTIVE_HIGH>;
752+
753+
wifi0: wifi@0,0 {
754+
reg = <0x80000 0x0 0x0 0x0 0x0>;
755+
compatible = "pci14e4,4433";
756+
brcm,board-type = "apple,sumatra";
757+
apple,antenna-sku = "XX";
758+
/* To be filled by the loader */
759+
local-mac-address = [00 10 18 00 00 10];
760+
};
761+
762+
bluetooth0: network@0,1 {
763+
compatible = "pci14e4,5f71";
764+
brcm,board-type = "apple,sumatra";
765+
// reg = <0x80100 0x0 0x0 0x0 0x0>;
766+
/* To be filled by the loader */
767+
local-bd-address = [00 00 00 00 00 00];
768+
};
769+
};
770+
771+
/* pci-slot6-dsp, PCIe slot-6 */
772+
pci@6,0 {
773+
compatible = "pci11f8,4000", "pciclass,060400", "pciclass,0604";
774+
device_type = "pci";
775+
reg = <0x23000 0x00 0x00 0x00 0x00>;
776+
bus-range = <0x09 0x09>;
777+
778+
#address-cells = <3>;
779+
#size-cells = <2>;
780+
ranges;
781+
};
782+
};
783+
};
784+
458785
&pcie0 {
459786
status = "disabled";
460787
};

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