Skip to content

Commit 4f25d7f

Browse files
nxpfrankliShawn Guo
nxpfrankli
authored and
Shawn Guo
committed
arm64: dts: imx8q: add camera ov5640 support for imx8qm-mek and imx8qxp-mek
Add ov5640 overlay file for imx8qm-mek and imx8qxp-mek board. Camera can connect different CSI port. So use dts overlay file to handle these difference connect options. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
1 parent 440bd77 commit 4f25d7f

6 files changed

Lines changed: 290 additions & 0 deletions

File tree

‎arch/arm64/boot/dts/freescale/Makefile‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -309,6 +309,14 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-eval-v1.2.dtb
309309
dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-ixora-v1.1.dtb
310310
dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-ixora-v1.2.dtb
311311
dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb
312+
313+
imx8qm-mek-ov5640-csi0-dtbs := imx8qm-mek.dtb imx8qm-mek-ov5640-csi0.dtbo
314+
dtb-${CONFIG_ARCH_MXC} += imx8qm-mek-ov5640-csi0.dtb
315+
imx8qm-mek-ov5640-csi1-dtbs := imx8qm-mek.dtb imx8qm-mek-ov5640-csi1.dtbo
316+
dtb-${CONFIG_ARCH_MXC} += imx8qm-mek-ov5640-csi1.dtb
317+
imx8qm-mek-ov5640-dual-dtbs := imx8qm-mek.dtb imx8qm-mek-ov5640-csi0.dtbo imx8qm-mek-ov5640-csi1.dtbo
318+
dtb-${CONFIG_ARCH_MXC} += imx8qm-mek-ov5640-dual.dtb
319+
312320
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
313321
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-aster.dtb
314322
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb
@@ -319,6 +327,9 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
319327
imx8qxp-mek-pcie-ep-dtbs += imx8qxp-mek.dtb imx-pcie0-ep.dtbo
320328
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek-pcie-ep.dtb
321329

330+
imx8qxp-mek-ov5640-csi-dtbs := imx8qxp-mek.dtb imx8qxp-mek-ov5640-csi.dtbo
331+
dtb-${CONFIG_ARCH_MXC} += imx8qxp-mek-ov5640-csi.dtb
332+
322333
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqp-mba8xx.dtb
323334
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqps-mb-smarc-2.dtb
324335
dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb

‎arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi0.dtso‎

Lines changed: 62 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,62 @@
1+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2+
/*
3+
* Copyright 2025 NXP
4+
*/
5+
6+
/dts-v1/;
7+
/plugin/;
8+
9+
#include <dt-bindings/gpio/gpio.h>
10+
#include <dt-bindings/media/video-interfaces.h>
11+
12+
&i2c_mipi_csi0 {
13+
#address-cells = <1>;
14+
#size-cells = <0>;
15+
clock-frequency = <100000>;
16+
pinctrl-0 = <&pinctrl_i2c_mipi_csi0>;
17+
pinctrl-names = "default";
18+
status = "okay";
19+
20+
ov5640_mipi_0: camera@3c {
21+
compatible = "ovti,ov5640";
22+
reg = <0x3c>;
23+
clocks = <&xtal24m>;
24+
clock-names = "xclk";
25+
pinctrl-0 = <&pinctrl_mipi_csi0>;
26+
pinctrl-names = "default";
27+
powerdown-gpios = <&lsio_gpio1 28 GPIO_ACTIVE_HIGH>;
28+
reset-gpios = <&lsio_gpio1 27 GPIO_ACTIVE_LOW>;
29+
AVDD-supply = <&reg_2v8>;
30+
DVDD-supply = <&reg_1v5>;
31+
DOVDD-supply = <&reg_1v8>;
32+
33+
port {
34+
ov5640_mipi_0_ep: endpoint {
35+
bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
36+
data-lanes = <1 2>;
37+
remote-endpoint = <&mipi_csi0_in>;
38+
};
39+
};
40+
};
41+
};
42+
43+
&irqsteer_csi0 {
44+
status = "okay";
45+
};
46+
47+
&isi {
48+
status = "okay";
49+
};
50+
51+
&mipi_csi_0 {
52+
status = "okay";
53+
54+
ports {
55+
port@0 {
56+
mipi_csi0_in: endpoint {
57+
data-lanes = <1 2>;
58+
remote-endpoint = <&ov5640_mipi_0_ep>;
59+
};
60+
};
61+
};
62+
};

‎arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi1.dtso‎

Lines changed: 62 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,62 @@
1+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2+
/*
3+
* Copyright 2025 NXP
4+
*/
5+
6+
/dts-v1/;
7+
/plugin/;
8+
9+
#include <dt-bindings/gpio/gpio.h>
10+
#include <dt-bindings/media/video-interfaces.h>
11+
12+
&i2c_mipi_csi1 {
13+
#address-cells = <1>;
14+
#size-cells = <0>;
15+
clock-frequency = <100000>;
16+
pinctrl-0 = <&pinctrl_i2c_mipi_csi1>;
17+
pinctrl-names = "default";
18+
status = "okay";
19+
20+
ov5640_mipi_1: camera@3c {
21+
compatible = "ovti,ov5640";
22+
reg = <0x3c>;
23+
clocks = <&xtal24m>;
24+
clock-names = "xclk";
25+
pinctrl-0 = <&pinctrl_mipi_csi1>;
26+
pinctrl-names = "default";
27+
powerdown-gpios = <&lsio_gpio1 31 GPIO_ACTIVE_HIGH>;
28+
reset-gpios = <&lsio_gpio1 30 GPIO_ACTIVE_LOW>;
29+
AVDD-supply = <&reg_2v8>;
30+
DVDD-supply = <&reg_1v5>;
31+
DOVDD-supply = <&reg_1v8>;
32+
33+
port {
34+
ov5640_mipi_1_ep: endpoint {
35+
bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
36+
data-lanes = <1 2>;
37+
remote-endpoint = <&mipi_csi1_in>;
38+
};
39+
};
40+
};
41+
};
42+
43+
&irqsteer_csi1 {
44+
status = "okay";
45+
};
46+
47+
&isi {
48+
status = "okay";
49+
};
50+
51+
&mipi_csi_1 {
52+
status = "okay";
53+
54+
ports {
55+
port@0 {
56+
mipi_csi1_in: endpoint {
57+
data-lanes = <1 2>;
58+
remote-endpoint = <&ov5640_mipi_1_ep>;
59+
};
60+
};
61+
};
62+
};

‎arch/arm64/boot/dts/freescale/imx8qm-mek.dts‎

Lines changed: 58 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,13 @@
3232
reg = <0x00000000 0x80000000 0 0x40000000>;
3333
};
3434

35+
xtal24m: clock-xtal24m {
36+
compatible = "fixed-clock";
37+
#clock-cells = <0>;
38+
clock-frequency = <24000000>;
39+
clock-output-names = "xtal_24MHz";
40+
};
41+
3542
reserved-memory {
3643
#address-cells = <2>;
3744
#size-cells = <2>;
@@ -221,6 +228,27 @@
221228
};
222229
};
223230

231+
reg_1v5: regulator-1v5 {
232+
compatible = "regulator-fixed";
233+
regulator-name = "1v5";
234+
regulator-min-microvolt = <1500000>;
235+
regulator-max-microvolt = <1500000>;
236+
};
237+
238+
reg_1v8: regulator-1v8 {
239+
compatible = "regulator-fixed";
240+
regulator-name = "1v8";
241+
regulator-min-microvolt = <1800000>;
242+
regulator-max-microvolt = <1800000>;
243+
};
244+
245+
reg_2v8: regulator-2v8 {
246+
compatible = "regulator-fixed";
247+
regulator-name = "2v8";
248+
regulator-min-microvolt = <2800000>;
249+
regulator-max-microvolt = <2800000>;
250+
};
251+
224252
reg_usdhc2_vmmc: usdhc2-vmmc {
225253
compatible = "regulator-fixed";
226254
regulator-name = "SD1_SPWR";
@@ -885,6 +913,20 @@
885913
>;
886914
};
887915

916+
pinctrl_i2c_mipi_csi0: i2c-mipi-csi0grp {
917+
fsl,pins = <
918+
IMX8QM_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2C0_SCL 0xc2000020
919+
IMX8QM_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2C0_SDA 0xc2000020
920+
>;
921+
};
922+
923+
pinctrl_i2c_mipi_csi1: i2c-mipi-csi1grp {
924+
fsl,pins = <
925+
IMX8QM_MIPI_CSI1_I2C0_SCL_MIPI_CSI1_I2C0_SCL 0xc2000020
926+
IMX8QM_MIPI_CSI1_I2C0_SDA_MIPI_CSI1_I2C0_SDA 0xc2000020
927+
>;
928+
};
929+
888930
pinctrl_i2c0: i2c0grp {
889931
fsl,pins = <
890932
IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0x06000021
@@ -1078,6 +1120,22 @@
10781120
>;
10791121
};
10801122

1123+
pinctrl_mipi_csi0: mipi-csi0grp {
1124+
fsl,pins = <
1125+
IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_IO27 0xC0000041
1126+
IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28 0xC0000041
1127+
IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xC0000041
1128+
>;
1129+
};
1130+
1131+
pinctrl_mipi_csi1: mipi-csi1grp {
1132+
fsl,pins = <
1133+
IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 0xC0000041
1134+
IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_IO31 0xC0000041
1135+
IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_ACM_MCLK_OUT 0xC0000041
1136+
>;
1137+
};
1138+
10811139
pinctrl_pciea: pcieagrp {
10821140
fsl,pins = <
10831141
IMX8QM_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 0x04000021

‎arch/arm64/boot/dts/freescale/imx8qxp-mek-ov5640-csi.dtso‎

Lines changed: 61 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,61 @@
1+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2+
/*
3+
* Copyright 2024 NXP
4+
*/
5+
/dts-v1/;
6+
/plugin/;
7+
8+
#include <dt-bindings/gpio/gpio.h>
9+
#include <dt-bindings/media/video-interfaces.h>
10+
11+
&i2c_mipi_csi0 {
12+
#address-cells = <1>;
13+
#size-cells = <0>;
14+
clock-frequency = <100000>;
15+
pinctrl-0 = <&pinctrl_i2c_mipi_csi0>;
16+
pinctrl-names = "default";
17+
status = "okay";
18+
19+
ov5640_mipi: camera@3c {
20+
compatible = "ovti,ov5640";
21+
reg = <0x3c>;
22+
clocks = <&xtal24m>;
23+
clock-names = "xclk";
24+
pinctrl-0 = <&pinctrl_mipi_csi0>;
25+
pinctrl-names = "default";
26+
powerdown-gpios = <&lsio_gpio3 7 GPIO_ACTIVE_HIGH>;
27+
reset-gpios = <&lsio_gpio3 8 GPIO_ACTIVE_LOW>;
28+
AVDD-supply = <&reg_2v8>;
29+
DVDD-supply = <&reg_1v5>;
30+
DOVDD-supply = <&reg_1v8>;
31+
32+
port {
33+
ov5640_mipi_ep: endpoint {
34+
bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
35+
data-lanes = <1 2>;
36+
remote-endpoint = <&mipi_csi0_in>;
37+
};
38+
};
39+
};
40+
};
41+
42+
&irqsteer_csi0 {
43+
status = "okay";
44+
};
45+
46+
&isi {
47+
status = "okay";
48+
};
49+
50+
&mipi_csi_0 {
51+
status = "okay";
52+
53+
ports {
54+
port@0 {
55+
mipi_csi0_in: endpoint {
56+
data-lanes = <1 2>;
57+
remote-endpoint = <&ov5640_mipi_ep>;
58+
};
59+
};
60+
};
61+
};

‎arch/arm64/boot/dts/freescale/imx8qxp-mek.dts‎

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -129,6 +129,27 @@
129129
};
130130
};
131131

132+
reg_1v5: regulator-1v5 {
133+
compatible = "regulator-fixed";
134+
regulator-name = "1v5";
135+
regulator-min-microvolt = <1500000>;
136+
regulator-max-microvolt = <1500000>;
137+
};
138+
139+
reg_1v8: regulator-1v8 {
140+
compatible = "regulator-fixed";
141+
regulator-name = "1v8";
142+
regulator-min-microvolt = <1800000>;
143+
regulator-max-microvolt = <1800000>;
144+
};
145+
146+
reg_2v8: regulator-2v8 {
147+
compatible = "regulator-fixed";
148+
regulator-name = "2v8";
149+
regulator-min-microvolt = <2800000>;
150+
regulator-max-microvolt = <2800000>;
151+
};
152+
132153
reg_pcieb: regulator-pcie {
133154
compatible = "regulator-fixed";
134155
regulator-max-microvolt = <3300000>;
@@ -846,6 +867,13 @@
846867
>;
847868
};
848869

870+
pinctrl_i2c_mipi_csi0: i2c-mipi-csi0grp {
871+
fsl,pins = <
872+
IMX8QXP_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2C0_SCL 0xc2000020
873+
IMX8QXP_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2C0_SDA 0xc2000020
874+
>;
875+
};
876+
849877
pinctrl_ioexp_rst: ioexprstgrp {
850878
fsl,pins = <
851879
IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01 0x06000021
@@ -886,6 +914,14 @@
886914
>;
887915
};
888916

917+
pinctrl_mipi_csi0: mipi-csi0grp {
918+
fsl,pins = <
919+
IMX8QXP_MIPI_CSI0_GPIO0_01_LSIO_GPIO3_IO07 0xC0000041
920+
IMX8QXP_MIPI_CSI0_GPIO0_00_LSIO_GPIO3_IO08 0xC0000041
921+
IMX8QXP_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xC0000041
922+
>;
923+
};
924+
889925
pinctrl_pcieb: pcieagrp {
890926
fsl,pins = <
891927
IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x06000021

0 commit comments

Comments
 (0)