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AlisonSchofielddavejiang
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cxl: Move hpa_to_spa callback to a new root decoder ops structure
The root decoder's HPA to SPA translation logic was implemented using a single function pointer. In preparation for additional per-decoder callbacks, convert this into a struct cxl_rd_ops and move the hpa_to_spa pointer into it. To avoid maintaining a static ops instance populated with mostly NULL pointers, allocate the ops structure dynamically only when a platform requires overrides (e.g. XOR interleave decoding). The setup can be extended as additional callbacks are added. Co-developed-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Link: https://patch.msgid.link/818530c82c351a9c0d3a204f593068dd2126a5a9.1754290144.git.alison.schofield@intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
1 parent 8f5ae30 commit 524b2b7

4 files changed

Lines changed: 25 additions & 9 deletions

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drivers/cxl/acpi.c

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,6 @@ static const guid_t acpi_cxl_qtg_id_guid =
2020
GUID_INIT(0xF365F9A6, 0xA7DE, 0x4071,
2121
0xA6, 0x6A, 0xB4, 0x0C, 0x0B, 0x4F, 0x8E, 0x52);
2222

23-
2423
static u64 cxl_xor_hpa_to_spa(struct cxl_root_decoder *cxlrd, u64 hpa)
2524
{
2625
struct cxl_cxims_data *cximsd = cxlrd->platform_data;
@@ -472,8 +471,13 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
472471

473472
cxlrd->qos_class = cfmws->qtg_id;
474473

475-
if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR)
476-
cxlrd->hpa_to_spa = cxl_xor_hpa_to_spa;
474+
if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR) {
475+
cxlrd->ops = kzalloc(sizeof(*cxlrd->ops), GFP_KERNEL);
476+
if (!cxlrd->ops)
477+
return -ENOMEM;
478+
479+
cxlrd->ops->hpa_to_spa = cxl_xor_hpa_to_spa;
480+
}
477481

478482
rc = cxl_decoder_add(cxld, target_map);
479483
if (rc)

drivers/cxl/core/port.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -450,6 +450,7 @@ static void cxl_root_decoder_release(struct device *dev)
450450
if (atomic_read(&cxlrd->region_id) >= 0)
451451
memregion_free(atomic_read(&cxlrd->region_id));
452452
__cxl_decoder_release(&cxlrd->cxlsd.cxld);
453+
kfree(cxlrd->ops);
453454
kfree(cxlrd);
454455
}
455456

drivers/cxl/core/region.c

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2918,6 +2918,11 @@ static bool cxl_is_hpa_in_chunk(u64 hpa, struct cxl_region *cxlr, int pos)
29182918
return false;
29192919
}
29202920

2921+
static bool has_hpa_to_spa(struct cxl_root_decoder *cxlrd)
2922+
{
2923+
return cxlrd->ops && cxlrd->ops->hpa_to_spa;
2924+
}
2925+
29212926
u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
29222927
u64 dpa)
29232928
{
@@ -2972,8 +2977,8 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
29722977
hpa = hpa_offset + p->res->start + p->cache_size;
29732978

29742979
/* Root decoder translation overrides typical modulo decode */
2975-
if (cxlrd->hpa_to_spa)
2976-
hpa = cxlrd->hpa_to_spa(cxlrd, hpa);
2980+
if (has_hpa_to_spa(cxlrd))
2981+
hpa = cxlrd->ops->hpa_to_spa(cxlrd, hpa);
29772982

29782983
if (!cxl_resource_contains_addr(p->res, hpa)) {
29792984
dev_dbg(&cxlr->dev,
@@ -2982,7 +2987,7 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
29822987
}
29832988

29842989
/* Simple chunk check, by pos & gran, only applies to modulo decodes */
2985-
if (!cxlrd->hpa_to_spa && (!cxl_is_hpa_in_chunk(hpa, cxlr, pos)))
2990+
if (!has_hpa_to_spa(cxlrd) && (!cxl_is_hpa_in_chunk(hpa, cxlr, pos)))
29862991
return ULLONG_MAX;
29872992

29882993
return hpa;

drivers/cxl/cxl.h

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -419,27 +419,33 @@ struct cxl_switch_decoder {
419419
};
420420

421421
struct cxl_root_decoder;
422-
typedef u64 (*cxl_hpa_to_spa_fn)(struct cxl_root_decoder *cxlrd, u64 hpa);
422+
/**
423+
* struct cxl_rd_ops - CXL root decoder callback operations
424+
* @hpa_to_spa: Convert host physical address to system physical address
425+
*/
426+
struct cxl_rd_ops {
427+
u64 (*hpa_to_spa)(struct cxl_root_decoder *cxlrd, u64 hpa);
428+
};
423429

424430
/**
425431
* struct cxl_root_decoder - Static platform CXL address decoder
426432
* @res: host / parent resource for region allocations
427433
* @cache_size: extended linear cache size if exists, otherwise zero.
428434
* @region_id: region id for next region provisioning event
429-
* @hpa_to_spa: translate CXL host-physical-address to Platform system-physical-address
430435
* @platform_data: platform specific configuration data
431436
* @range_lock: sync region autodiscovery by address range
432437
* @qos_class: QoS performance class cookie
438+
* @ops: CXL root decoder operations
433439
* @cxlsd: base cxl switch decoder
434440
*/
435441
struct cxl_root_decoder {
436442
struct resource *res;
437443
resource_size_t cache_size;
438444
atomic_t region_id;
439-
cxl_hpa_to_spa_fn hpa_to_spa;
440445
void *platform_data;
441446
struct mutex range_lock;
442447
int qos_class;
448+
struct cxl_rd_ops *ops;
443449
struct cxl_switch_decoder cxlsd;
444450
};
445451

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