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181 | 181 | #reset-cells = <1>; |
182 | 182 | }; |
183 | 183 |
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184 | | - mmc0: mmc@4020000 { |
185 | | - compatible = "allwinner,sun55i-a523-mmc", |
186 | | - "allwinner,sun20i-d1-mmc"; |
187 | | - reg = <0x04020000 0x1000>; |
188 | | - clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; |
189 | | - clock-names = "ahb", "mmc"; |
190 | | - resets = <&ccu RST_BUS_MMC0>; |
191 | | - reset-names = "ahb"; |
192 | | - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; |
193 | | - pinctrl-names = "default"; |
194 | | - pinctrl-0 = <&mmc0_pins>; |
195 | | - status = "disabled"; |
196 | | - |
197 | | - max-frequency = <150000000>; |
198 | | - cap-sd-highspeed; |
199 | | - cap-mmc-highspeed; |
200 | | - cap-sdio-irq; |
201 | | - #address-cells = <1>; |
202 | | - #size-cells = <0>; |
203 | | - }; |
204 | | - |
205 | | - mmc1: mmc@4021000 { |
206 | | - compatible = "allwinner,sun55i-a523-mmc", |
207 | | - "allwinner,sun20i-d1-mmc"; |
208 | | - reg = <0x04021000 0x1000>; |
209 | | - clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; |
210 | | - clock-names = "ahb", "mmc"; |
211 | | - resets = <&ccu RST_BUS_MMC1>; |
212 | | - reset-names = "ahb"; |
213 | | - interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; |
214 | | - pinctrl-names = "default"; |
215 | | - pinctrl-0 = <&mmc1_pins>; |
216 | | - status = "disabled"; |
217 | | - |
218 | | - max-frequency = <150000000>; |
219 | | - cap-sd-highspeed; |
220 | | - cap-mmc-highspeed; |
221 | | - cap-sdio-irq; |
222 | | - #address-cells = <1>; |
223 | | - #size-cells = <0>; |
224 | | - }; |
225 | | - |
226 | | - mmc2: mmc@4022000 { |
227 | | - compatible = "allwinner,sun55i-a523-mmc", |
228 | | - "allwinner,sun20i-d1-mmc"; |
229 | | - reg = <0x04022000 0x1000>; |
230 | | - clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; |
231 | | - clock-names = "ahb", "mmc"; |
232 | | - resets = <&ccu RST_BUS_MMC2>; |
233 | | - reset-names = "ahb"; |
234 | | - interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; |
235 | | - pinctrl-names = "default"; |
236 | | - pinctrl-0 = <&mmc2_pins>; |
237 | | - status = "disabled"; |
238 | | - |
239 | | - max-frequency = <150000000>; |
240 | | - cap-sd-highspeed; |
241 | | - cap-mmc-highspeed; |
242 | | - cap-sdio-irq; |
243 | | - #address-cells = <1>; |
244 | | - #size-cells = <0>; |
245 | | - }; |
246 | | - |
247 | 184 | wdt: watchdog@2050000 { |
248 | 185 | compatible = "allwinner,sun55i-a523-wdt"; |
249 | 186 | reg = <0x2050000 0x20>; |
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449 | 386 | }; |
450 | 387 | }; |
451 | 388 |
|
| 389 | + mmc0: mmc@4020000 { |
| 390 | + compatible = "allwinner,sun55i-a523-mmc", |
| 391 | + "allwinner,sun20i-d1-mmc"; |
| 392 | + reg = <0x04020000 0x1000>; |
| 393 | + clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; |
| 394 | + clock-names = "ahb", "mmc"; |
| 395 | + resets = <&ccu RST_BUS_MMC0>; |
| 396 | + reset-names = "ahb"; |
| 397 | + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; |
| 398 | + pinctrl-names = "default"; |
| 399 | + pinctrl-0 = <&mmc0_pins>; |
| 400 | + status = "disabled"; |
| 401 | + |
| 402 | + max-frequency = <150000000>; |
| 403 | + cap-sd-highspeed; |
| 404 | + cap-mmc-highspeed; |
| 405 | + cap-sdio-irq; |
| 406 | + #address-cells = <1>; |
| 407 | + #size-cells = <0>; |
| 408 | + }; |
| 409 | + |
| 410 | + mmc1: mmc@4021000 { |
| 411 | + compatible = "allwinner,sun55i-a523-mmc", |
| 412 | + "allwinner,sun20i-d1-mmc"; |
| 413 | + reg = <0x04021000 0x1000>; |
| 414 | + clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; |
| 415 | + clock-names = "ahb", "mmc"; |
| 416 | + resets = <&ccu RST_BUS_MMC1>; |
| 417 | + reset-names = "ahb"; |
| 418 | + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; |
| 419 | + pinctrl-names = "default"; |
| 420 | + pinctrl-0 = <&mmc1_pins>; |
| 421 | + status = "disabled"; |
| 422 | + |
| 423 | + max-frequency = <150000000>; |
| 424 | + cap-sd-highspeed; |
| 425 | + cap-mmc-highspeed; |
| 426 | + cap-sdio-irq; |
| 427 | + #address-cells = <1>; |
| 428 | + #size-cells = <0>; |
| 429 | + }; |
| 430 | + |
| 431 | + mmc2: mmc@4022000 { |
| 432 | + compatible = "allwinner,sun55i-a523-mmc", |
| 433 | + "allwinner,sun20i-d1-mmc"; |
| 434 | + reg = <0x04022000 0x1000>; |
| 435 | + clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; |
| 436 | + clock-names = "ahb", "mmc"; |
| 437 | + resets = <&ccu RST_BUS_MMC2>; |
| 438 | + reset-names = "ahb"; |
| 439 | + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; |
| 440 | + pinctrl-names = "default"; |
| 441 | + pinctrl-0 = <&mmc2_pins>; |
| 442 | + status = "disabled"; |
| 443 | + |
| 444 | + max-frequency = <150000000>; |
| 445 | + cap-sd-highspeed; |
| 446 | + cap-mmc-highspeed; |
| 447 | + cap-sdio-irq; |
| 448 | + #address-cells = <1>; |
| 449 | + #size-cells = <0>; |
| 450 | + }; |
| 451 | + |
452 | 452 | usb_otg: usb@4100000 { |
453 | 453 | compatible = "allwinner,sun55i-a523-musb", |
454 | 454 | "allwinner,sun8i-a33-musb"; |
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