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weiny2
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cxl/events: Separate UUID from event structures
The UEFI CXL CPER structure does not include the UUID. Now that the UUID is passed separately to the trace event there is no need to have the UUID in those structures. Move UUID from the event record header to the raw structures. Adjust cxl-test to Create dummy structures for creating test records. Signed-off-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/20231220-cxl-cper-v5-5-1bb8a4ca2c7a@intel.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
1 parent 207a1f8 commit 6eade11

3 files changed

Lines changed: 81 additions & 56 deletions

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‎drivers/cxl/core/mbox.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -840,7 +840,7 @@ static void cxl_event_trace_record(const struct cxl_memdev *cxlmd,
840840
enum cxl_event_log_type type,
841841
struct cxl_event_record_raw *record)
842842
{
843-
uuid_t *id = &record->hdr.id;
843+
uuid_t *id = &record->id;
844844

845845
if (uuid_equal(id, &CXL_EVENT_GEN_MEDIA_UUID)) {
846846
struct cxl_event_gen_media *rec =

‎include/linux/cxl-event.h‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,6 @@
88
* CXL rev 3.0 section 8.2.9.2.1; Table 8-42
99
*/
1010
struct cxl_event_record_hdr {
11-
uuid_t id;
1211
u8 length;
1312
u8 flags[3];
1413
__le16 handle;
@@ -18,8 +17,13 @@ struct cxl_event_record_hdr {
1817
u8 reserved[15];
1918
} __packed;
2019

20+
/*
21+
* Common Event Record Format
22+
* CXL rev 3.0 section 8.2.9.2.1; Table 8-42
23+
*/
2124
#define CXL_EVENT_RECORD_DATA_LENGTH 0x50
2225
struct cxl_event_record_raw {
26+
uuid_t id;
2327
struct cxl_event_record_hdr hdr;
2428
u8 data[CXL_EVENT_RECORD_DATA_LENGTH];
2529
} __packed;

‎tools/testing/cxl/test/mem.c‎

Lines changed: 75 additions & 54 deletions
Original file line numberDiff line numberDiff line change
@@ -337,9 +337,9 @@ static void cxl_mock_event_trigger(struct device *dev)
337337
}
338338

339339
struct cxl_event_record_raw maint_needed = {
340+
.id = UUID_INIT(0xBA5EBA11, 0xABCD, 0xEFEB,
341+
0xa5, 0x5a, 0xa5, 0x5a, 0xa5, 0xa5, 0x5a, 0xa5),
340342
.hdr = {
341-
.id = UUID_INIT(0xBA5EBA11, 0xABCD, 0xEFEB,
342-
0xa5, 0x5a, 0xa5, 0x5a, 0xa5, 0xa5, 0x5a, 0xa5),
343343
.length = sizeof(struct cxl_event_record_raw),
344344
.flags[0] = CXL_EVENT_RECORD_FLAG_MAINT_NEEDED,
345345
/* .handle = Set dynamically */
@@ -349,9 +349,9 @@ struct cxl_event_record_raw maint_needed = {
349349
};
350350

351351
struct cxl_event_record_raw hardware_replace = {
352+
.id = UUID_INIT(0xABCDEFEB, 0xBA11, 0xBA5E,
353+
0xa5, 0x5a, 0xa5, 0x5a, 0xa5, 0xa5, 0x5a, 0xa5),
352354
.hdr = {
353-
.id = UUID_INIT(0xABCDEFEB, 0xBA11, 0xBA5E,
354-
0xa5, 0x5a, 0xa5, 0x5a, 0xa5, 0xa5, 0x5a, 0xa5),
355355
.length = sizeof(struct cxl_event_record_raw),
356356
.flags[0] = CXL_EVENT_RECORD_FLAG_HW_REPLACE,
357357
/* .handle = Set dynamically */
@@ -360,61 +360,82 @@ struct cxl_event_record_raw hardware_replace = {
360360
.data = { 0xDE, 0xAD, 0xBE, 0xEF },
361361
};
362362

363-
struct cxl_event_gen_media gen_media = {
364-
.hdr = {
365-
.id = CXL_EVENT_GEN_MEDIA_UUID,
366-
.length = sizeof(struct cxl_event_gen_media),
367-
.flags[0] = CXL_EVENT_RECORD_FLAG_PERMANENT,
368-
/* .handle = Set dynamically */
369-
.related_handle = cpu_to_le16(0),
363+
struct cxl_test_gen_media {
364+
uuid_t id;
365+
struct cxl_event_gen_media rec;
366+
} __packed;
367+
368+
struct cxl_test_gen_media gen_media = {
369+
.id = CXL_EVENT_GEN_MEDIA_UUID,
370+
.rec = {
371+
.hdr = {
372+
.length = sizeof(struct cxl_test_gen_media),
373+
.flags[0] = CXL_EVENT_RECORD_FLAG_PERMANENT,
374+
/* .handle = Set dynamically */
375+
.related_handle = cpu_to_le16(0),
376+
},
377+
.phys_addr = cpu_to_le64(0x2000),
378+
.descriptor = CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,
379+
.type = CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR,
380+
.transaction_type = CXL_GMER_TRANS_HOST_WRITE,
381+
/* .validity_flags = <set below> */
382+
.channel = 1,
383+
.rank = 30
370384
},
371-
.phys_addr = cpu_to_le64(0x2000),
372-
.descriptor = CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,
373-
.type = CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR,
374-
.transaction_type = CXL_GMER_TRANS_HOST_WRITE,
375-
/* .validity_flags = <set below> */
376-
.channel = 1,
377-
.rank = 30
378385
};
379386

380-
struct cxl_event_dram dram = {
381-
.hdr = {
382-
.id = CXL_EVENT_DRAM_UUID,
383-
.length = sizeof(struct cxl_event_dram),
384-
.flags[0] = CXL_EVENT_RECORD_FLAG_PERF_DEGRADED,
385-
/* .handle = Set dynamically */
386-
.related_handle = cpu_to_le16(0),
387+
struct cxl_test_dram {
388+
uuid_t id;
389+
struct cxl_event_dram rec;
390+
} __packed;
391+
392+
struct cxl_test_dram dram = {
393+
.id = CXL_EVENT_DRAM_UUID,
394+
.rec = {
395+
.hdr = {
396+
.length = sizeof(struct cxl_test_dram),
397+
.flags[0] = CXL_EVENT_RECORD_FLAG_PERF_DEGRADED,
398+
/* .handle = Set dynamically */
399+
.related_handle = cpu_to_le16(0),
400+
},
401+
.phys_addr = cpu_to_le64(0x8000),
402+
.descriptor = CXL_GMER_EVT_DESC_THRESHOLD_EVENT,
403+
.type = CXL_GMER_MEM_EVT_TYPE_INV_ADDR,
404+
.transaction_type = CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB,
405+
/* .validity_flags = <set below> */
406+
.channel = 1,
407+
.bank_group = 5,
408+
.bank = 2,
409+
.column = {0xDE, 0xAD},
387410
},
388-
.phys_addr = cpu_to_le64(0x8000),
389-
.descriptor = CXL_GMER_EVT_DESC_THRESHOLD_EVENT,
390-
.type = CXL_GMER_MEM_EVT_TYPE_INV_ADDR,
391-
.transaction_type = CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB,
392-
/* .validity_flags = <set below> */
393-
.channel = 1,
394-
.bank_group = 5,
395-
.bank = 2,
396-
.column = {0xDE, 0xAD},
397411
};
398412

399-
struct cxl_event_mem_module mem_module = {
400-
.hdr = {
401-
.id = CXL_EVENT_MEM_MODULE_UUID,
402-
.length = sizeof(struct cxl_event_mem_module),
403-
/* .handle = Set dynamically */
404-
.related_handle = cpu_to_le16(0),
413+
struct cxl_test_mem_module {
414+
uuid_t id;
415+
struct cxl_event_mem_module rec;
416+
} __packed;
417+
418+
struct cxl_test_mem_module mem_module = {
419+
.id = CXL_EVENT_MEM_MODULE_UUID,
420+
.rec = {
421+
.hdr = {
422+
.length = sizeof(struct cxl_test_mem_module),
423+
/* .handle = Set dynamically */
424+
.related_handle = cpu_to_le16(0),
425+
},
426+
.event_type = CXL_MMER_TEMP_CHANGE,
427+
.info = {
428+
.health_status = CXL_DHI_HS_PERFORMANCE_DEGRADED,
429+
.media_status = CXL_DHI_MS_ALL_DATA_LOST,
430+
.add_status = (CXL_DHI_AS_CRITICAL << 2) |
431+
(CXL_DHI_AS_WARNING << 4) |
432+
(CXL_DHI_AS_WARNING << 5),
433+
.device_temp = { 0xDE, 0xAD},
434+
.dirty_shutdown_cnt = { 0xde, 0xad, 0xbe, 0xef },
435+
.cor_vol_err_cnt = { 0xde, 0xad, 0xbe, 0xef },
436+
.cor_per_err_cnt = { 0xde, 0xad, 0xbe, 0xef },
437+
}
405438
},
406-
.event_type = CXL_MMER_TEMP_CHANGE,
407-
.info = {
408-
.health_status = CXL_DHI_HS_PERFORMANCE_DEGRADED,
409-
.media_status = CXL_DHI_MS_ALL_DATA_LOST,
410-
.add_status = (CXL_DHI_AS_CRITICAL << 2) |
411-
(CXL_DHI_AS_WARNING << 4) |
412-
(CXL_DHI_AS_WARNING << 5),
413-
.device_temp = { 0xDE, 0xAD},
414-
.dirty_shutdown_cnt = { 0xde, 0xad, 0xbe, 0xef },
415-
.cor_vol_err_cnt = { 0xde, 0xad, 0xbe, 0xef },
416-
.cor_per_err_cnt = { 0xde, 0xad, 0xbe, 0xef },
417-
}
418439
};
419440

420441
static int mock_set_timestamp(struct cxl_dev_state *cxlds,
@@ -436,11 +457,11 @@ static int mock_set_timestamp(struct cxl_dev_state *cxlds,
436457
static void cxl_mock_add_event_logs(struct mock_event_store *mes)
437458
{
438459
put_unaligned_le16(CXL_GMER_VALID_CHANNEL | CXL_GMER_VALID_RANK,
439-
&gen_media.validity_flags);
460+
&gen_media.rec.validity_flags);
440461

441462
put_unaligned_le16(CXL_DER_VALID_CHANNEL | CXL_DER_VALID_BANK_GROUP |
442463
CXL_DER_VALID_BANK | CXL_DER_VALID_COLUMN,
443-
&dram.validity_flags);
464+
&dram.rec.validity_flags);
444465

445466
mes_add_event(mes, CXL_EVENT_TYPE_INFO, &maint_needed);
446467
mes_add_event(mes, CXL_EVENT_TYPE_INFO,

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