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soc/tegra: pmc: Update address mapping sequence for PMC apertures
On Tegra SoCs prior to Tegra186, PMC has single address range only. Starting from and after Tegra186, PMC has additional address ranges apart from base address range. Currently in PMC driver, we try to map these additional address ranges on all SoCs and if we fail then we assume that the range is not valid for an SoC. This change makes it more explicit on which address ranges are expected to be present on which SoCs and maps the additional address ranges only on SoCs from and after Tegra186. Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Lines changed: 20 additions & 14 deletions

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drivers/soc/tegra/pmc.c

Lines changed: 20 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -384,6 +384,7 @@ struct tegra_pmc_soc {
384384
bool has_blink_output;
385385
bool has_usb_sleepwalk;
386386
bool supports_core_domain;
387+
bool has_single_mmio_aperture;
387388
};
388389

389390
/**
@@ -2885,31 +2886,28 @@ static int tegra_pmc_probe(struct platform_device *pdev)
28852886
if (IS_ERR(base))
28862887
return PTR_ERR(base);
28872888

2888-
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "wake");
2889-
if (res) {
2889+
if (pmc->soc->has_single_mmio_aperture) {
2890+
pmc->wake = base;
2891+
pmc->aotag = base;
2892+
pmc->scratch = base;
2893+
} else {
2894+
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2895+
"wake");
28902896
pmc->wake = devm_ioremap_resource(&pdev->dev, res);
28912897
if (IS_ERR(pmc->wake))
28922898
return PTR_ERR(pmc->wake);
2893-
} else {
2894-
pmc->wake = base;
2895-
}
28962899

2897-
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "aotag");
2898-
if (res) {
2900+
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2901+
"aotag");
28992902
pmc->aotag = devm_ioremap_resource(&pdev->dev, res);
29002903
if (IS_ERR(pmc->aotag))
29012904
return PTR_ERR(pmc->aotag);
2902-
} else {
2903-
pmc->aotag = base;
2904-
}
29052905

2906-
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "scratch");
2907-
if (res) {
2906+
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2907+
"scratch");
29082908
pmc->scratch = devm_ioremap_resource(&pdev->dev, res);
29092909
if (IS_ERR(pmc->scratch))
29102910
return PTR_ERR(pmc->scratch);
2911-
} else {
2912-
pmc->scratch = base;
29132911
}
29142912

29152913
pmc->clk = devm_clk_get_optional(&pdev->dev, "pclk");
@@ -3300,6 +3298,7 @@ static const struct tegra_pmc_soc tegra20_pmc_soc = {
33003298
.num_pmc_clks = 0,
33013299
.has_blink_output = true,
33023300
.has_usb_sleepwalk = true,
3301+
.has_single_mmio_aperture = true,
33033302
};
33043303

33053304
static const char * const tegra30_powergates[] = {
@@ -3361,6 +3360,7 @@ static const struct tegra_pmc_soc tegra30_pmc_soc = {
33613360
.num_pmc_clks = ARRAY_SIZE(tegra_pmc_clks_data),
33623361
.has_blink_output = true,
33633362
.has_usb_sleepwalk = true,
3363+
.has_single_mmio_aperture = true,
33643364
};
33653365

33663366
static const char * const tegra114_powergates[] = {
@@ -3418,6 +3418,7 @@ static const struct tegra_pmc_soc tegra114_pmc_soc = {
34183418
.num_pmc_clks = ARRAY_SIZE(tegra_pmc_clks_data),
34193419
.has_blink_output = true,
34203420
.has_usb_sleepwalk = true,
3421+
.has_single_mmio_aperture = true,
34213422
};
34223423

34233424
static const char * const tegra124_powergates[] = {
@@ -3562,6 +3563,7 @@ static const struct tegra_pmc_soc tegra124_pmc_soc = {
35623563
.num_pmc_clks = ARRAY_SIZE(tegra_pmc_clks_data),
35633564
.has_blink_output = true,
35643565
.has_usb_sleepwalk = true,
3566+
.has_single_mmio_aperture = true,
35653567
};
35663568

35673569
static const char * const tegra210_powergates[] = {
@@ -3725,6 +3727,7 @@ static const struct tegra_pmc_soc tegra210_pmc_soc = {
37253727
.num_pmc_clks = ARRAY_SIZE(tegra_pmc_clks_data),
37263728
.has_blink_output = true,
37273729
.has_usb_sleepwalk = true,
3730+
.has_single_mmio_aperture = true,
37283731
};
37293732

37303733
static const struct tegra_io_pad_soc tegra186_io_pads[] = {
@@ -3922,6 +3925,7 @@ static const struct tegra_pmc_soc tegra186_pmc_soc = {
39223925
.num_pmc_clks = 0,
39233926
.has_blink_output = false,
39243927
.has_usb_sleepwalk = false,
3928+
.has_single_mmio_aperture = false,
39253929
};
39263930

39273931
static const struct tegra_io_pad_soc tegra194_io_pads[] = {
@@ -4107,6 +4111,7 @@ static const struct tegra_pmc_soc tegra194_pmc_soc = {
41074111
.num_pmc_clks = 0,
41084112
.has_blink_output = false,
41094113
.has_usb_sleepwalk = false,
4114+
.has_single_mmio_aperture = false,
41104115
};
41114116

41124117
static const struct tegra_io_pad_soc tegra234_io_pads[] = {
@@ -4235,6 +4240,7 @@ static const struct tegra_pmc_soc tegra234_pmc_soc = {
42354240
.pmc_clks_data = NULL,
42364241
.num_pmc_clks = 0,
42374242
.has_blink_output = false,
4243+
.has_single_mmio_aperture = false,
42384244
};
42394245

42404246
static const struct of_device_id tegra_pmc_match[] = {

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