@@ -1098,18 +1098,15 @@ static const struct rockchip_tsadc_chip px30_tsadc_data = {
10981098 /* cpu, gpu */
10991099 .chn_offset = 0 ,
11001100 .chn_num = 2 , /* 2 channels for tsadc */
1101-
11021101 .tshut_mode = TSHUT_MODE_CRU , /* default TSHUT via CRU */
11031102 .tshut_temp = 95000 ,
1104-
11051103 .initialize = rk_tsadcv4_initialize ,
11061104 .irq_ack = rk_tsadcv3_irq_ack ,
11071105 .control = rk_tsadcv3_control ,
11081106 .get_temp = rk_tsadcv2_get_temp ,
11091107 .set_alarm_temp = rk_tsadcv2_alarm_temp ,
11101108 .set_tshut_temp = rk_tsadcv2_tshut_temp ,
11111109 .set_tshut_mode = rk_tsadcv2_tshut_mode ,
1112-
11131110 .table = {
11141111 .id = rk3328_code_table ,
11151112 .length = ARRAY_SIZE (rk3328_code_table ),
@@ -1122,19 +1119,16 @@ static const struct rockchip_tsadc_chip rv1108_tsadc_data = {
11221119 /* cpu */
11231120 .chn_offset = 0 ,
11241121 .chn_num = 1 , /* one channel for tsadc */
1125-
11261122 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
11271123 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
11281124 .tshut_temp = 95000 ,
1129-
11301125 .initialize = rk_tsadcv2_initialize ,
11311126 .irq_ack = rk_tsadcv3_irq_ack ,
11321127 .control = rk_tsadcv3_control ,
11331128 .get_temp = rk_tsadcv2_get_temp ,
11341129 .set_alarm_temp = rk_tsadcv2_alarm_temp ,
11351130 .set_tshut_temp = rk_tsadcv2_tshut_temp ,
11361131 .set_tshut_mode = rk_tsadcv2_tshut_mode ,
1137-
11381132 .table = {
11391133 .id = rv1108_table ,
11401134 .length = ARRAY_SIZE (rv1108_table ),
@@ -1147,19 +1141,16 @@ static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
11471141 /* cpu */
11481142 .chn_offset = 0 ,
11491143 .chn_num = 1 , /* one channel for tsadc */
1150-
11511144 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
11521145 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
11531146 .tshut_temp = 95000 ,
1154-
11551147 .initialize = rk_tsadcv2_initialize ,
11561148 .irq_ack = rk_tsadcv3_irq_ack ,
11571149 .control = rk_tsadcv3_control ,
11581150 .get_temp = rk_tsadcv2_get_temp ,
11591151 .set_alarm_temp = rk_tsadcv2_alarm_temp ,
11601152 .set_tshut_temp = rk_tsadcv2_tshut_temp ,
11611153 .set_tshut_mode = rk_tsadcv2_tshut_mode ,
1162-
11631154 .table = {
11641155 .id = rk3228_code_table ,
11651156 .length = ARRAY_SIZE (rk3228_code_table ),
@@ -1172,19 +1163,16 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
11721163 /* cpu, gpu */
11731164 .chn_offset = 1 ,
11741165 .chn_num = 2 , /* two channels for tsadc */
1175-
11761166 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
11771167 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
11781168 .tshut_temp = 95000 ,
1179-
11801169 .initialize = rk_tsadcv2_initialize ,
11811170 .irq_ack = rk_tsadcv2_irq_ack ,
11821171 .control = rk_tsadcv2_control ,
11831172 .get_temp = rk_tsadcv2_get_temp ,
11841173 .set_alarm_temp = rk_tsadcv2_alarm_temp ,
11851174 .set_tshut_temp = rk_tsadcv2_tshut_temp ,
11861175 .set_tshut_mode = rk_tsadcv2_tshut_mode ,
1187-
11881176 .table = {
11891177 .id = rk3288_code_table ,
11901178 .length = ARRAY_SIZE (rk3288_code_table ),
@@ -1197,18 +1185,15 @@ static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
11971185 /* cpu */
11981186 .chn_offset = 0 ,
11991187 .chn_num = 1 , /* one channels for tsadc */
1200-
12011188 .tshut_mode = TSHUT_MODE_CRU , /* default TSHUT via CRU */
12021189 .tshut_temp = 95000 ,
1203-
12041190 .initialize = rk_tsadcv2_initialize ,
12051191 .irq_ack = rk_tsadcv3_irq_ack ,
12061192 .control = rk_tsadcv3_control ,
12071193 .get_temp = rk_tsadcv2_get_temp ,
12081194 .set_alarm_temp = rk_tsadcv2_alarm_temp ,
12091195 .set_tshut_temp = rk_tsadcv2_tshut_temp ,
12101196 .set_tshut_mode = rk_tsadcv2_tshut_mode ,
1211-
12121197 .table = {
12131198 .id = rk3328_code_table ,
12141199 .length = ARRAY_SIZE (rk3328_code_table ),
@@ -1221,19 +1206,16 @@ static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
12211206 /* cpu, gpu */
12221207 .chn_offset = 0 ,
12231208 .chn_num = 2 , /* two channels for tsadc */
1224-
12251209 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
12261210 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
12271211 .tshut_temp = 95000 ,
1228-
12291212 .initialize = rk_tsadcv3_initialize ,
12301213 .irq_ack = rk_tsadcv3_irq_ack ,
12311214 .control = rk_tsadcv3_control ,
12321215 .get_temp = rk_tsadcv2_get_temp ,
12331216 .set_alarm_temp = rk_tsadcv2_alarm_temp ,
12341217 .set_tshut_temp = rk_tsadcv2_tshut_temp ,
12351218 .set_tshut_mode = rk_tsadcv2_tshut_mode ,
1236-
12371219 .table = {
12381220 .id = rk3228_code_table ,
12391221 .length = ARRAY_SIZE (rk3228_code_table ),
@@ -1246,19 +1228,16 @@ static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
12461228 /* cpu, gpu */
12471229 .chn_offset = 0 ,
12481230 .chn_num = 2 , /* two channels for tsadc */
1249-
12501231 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
12511232 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
12521233 .tshut_temp = 95000 ,
1253-
12541234 .initialize = rk_tsadcv2_initialize ,
12551235 .irq_ack = rk_tsadcv2_irq_ack ,
12561236 .control = rk_tsadcv2_control ,
12571237 .get_temp = rk_tsadcv2_get_temp ,
12581238 .set_alarm_temp = rk_tsadcv2_alarm_temp ,
12591239 .set_tshut_temp = rk_tsadcv2_tshut_temp ,
12601240 .set_tshut_mode = rk_tsadcv2_tshut_mode ,
1261-
12621241 .table = {
12631242 .id = rk3368_code_table ,
12641243 .length = ARRAY_SIZE (rk3368_code_table ),
@@ -1271,19 +1250,16 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
12711250 /* cpu, gpu */
12721251 .chn_offset = 0 ,
12731252 .chn_num = 2 , /* two channels for tsadc */
1274-
12751253 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
12761254 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
12771255 .tshut_temp = 95000 ,
1278-
12791256 .initialize = rk_tsadcv3_initialize ,
12801257 .irq_ack = rk_tsadcv3_irq_ack ,
12811258 .control = rk_tsadcv3_control ,
12821259 .get_temp = rk_tsadcv2_get_temp ,
12831260 .set_alarm_temp = rk_tsadcv2_alarm_temp ,
12841261 .set_tshut_temp = rk_tsadcv2_tshut_temp ,
12851262 .set_tshut_mode = rk_tsadcv2_tshut_mode ,
1286-
12871263 .table = {
12881264 .id = rk3399_code_table ,
12891265 .length = ARRAY_SIZE (rk3399_code_table ),
@@ -1296,19 +1272,16 @@ static const struct rockchip_tsadc_chip rk3568_tsadc_data = {
12961272 /* cpu, gpu */
12971273 .chn_offset = 0 ,
12981274 .chn_num = 2 , /* two channels for tsadc */
1299-
13001275 .tshut_mode = TSHUT_MODE_GPIO , /* default TSHUT via GPIO give PMIC */
13011276 .tshut_polarity = TSHUT_LOW_ACTIVE , /* default TSHUT LOW ACTIVE */
13021277 .tshut_temp = 95000 ,
1303-
13041278 .initialize = rk_tsadcv7_initialize ,
13051279 .irq_ack = rk_tsadcv3_irq_ack ,
13061280 .control = rk_tsadcv3_control ,
13071281 .get_temp = rk_tsadcv2_get_temp ,
13081282 .set_alarm_temp = rk_tsadcv2_alarm_temp ,
13091283 .set_tshut_temp = rk_tsadcv2_tshut_temp ,
13101284 .set_tshut_mode = rk_tsadcv2_tshut_mode ,
1311-
13121285 .table = {
13131286 .id = rk3568_code_table ,
13141287 .length = ARRAY_SIZE (rk3568_code_table ),
0 commit comments