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alyssarosenzweigjannau
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dt-bindings: pci: apple,pcie: Add t6020 compatible string
t6020 adds some register ranges compared to t8103, so requires a new compatible as well as the new PHY registers themselves. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> [maz: added PHY registers] Signed-off-by: Marc Zyngier <maz@kernel.org>
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Documentation/devicetree/bindings/pci/apple,pcie.yaml

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implements its root ports. But the ATU found on most DesignWare
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PCIe host bridges is absent.
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On systems derived from T602x, the PHY registers are in a region
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separate from the port registers. In that case, there is one PHY
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register range per port register range.
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All root ports share a single ECAM space, but separate GPIOs are
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used to take the PCI devices on those ports out of reset. Therefore
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the standard "reset-gpios" and "max-link-speed" properties appear on
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- apple,t8103-pcie
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- apple,t8112-pcie
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- apple,t6000-pcie
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- apple,t6020-pcie
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- const: apple,pcie
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reg:
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minItems: 3
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maxItems: 6
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maxItems: 10
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reg-names:
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minItems: 3
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- const: port1
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- const: port2
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- const: port3
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- const: phy0
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- const: phy1
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- const: phy2
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- const: phy3
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ranges:
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minItems: 2

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