Skip to content

Commit 7212d62

Browse files
ptr324martinkpetersen
authored andcommitted
scsi: ufs: host: mediatek: Fix PWM mode switch issue
Address a failure in switching to PWM mode by ensuring proper configuration of power modes and adaptation settings. The changes include checks for SLOW_MODE and adjustments to the desired working mode and adaptation configuration based on the device's power mode and hardware version. Signed-off-by: Peter Wang <peter.wang@mediatek.com> Link: https://lore.kernel.org/r/20250811131423.3444014-6-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
1 parent 86a678a commit 7212d62

1 file changed

Lines changed: 22 additions & 3 deletions

File tree

drivers/ufs/host/ufs-mediatek.c

Lines changed: 22 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1321,6 +1321,10 @@ static bool ufs_mtk_pmc_via_fastauto(struct ufs_hba *hba,
13211321
dev_req_params->gear_rx < UFS_HS_G4)
13221322
return false;
13231323

1324+
if (dev_req_params->pwr_tx == SLOW_MODE ||
1325+
dev_req_params->pwr_rx == SLOW_MODE)
1326+
return false;
1327+
13241328
return true;
13251329
}
13261330

@@ -1336,6 +1340,10 @@ static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
13361340
host_params.hs_rx_gear = UFS_HS_G5;
13371341
host_params.hs_tx_gear = UFS_HS_G5;
13381342

1343+
if (dev_max_params->pwr_rx == SLOW_MODE ||
1344+
dev_max_params->pwr_tx == SLOW_MODE)
1345+
host_params.desired_working_mode = UFS_PWM_MODE;
1346+
13391347
ret = ufshcd_negotiate_pwr_params(&host_params, dev_max_params, dev_req_params);
13401348
if (ret) {
13411349
pr_info("%s: failed to determine capabilities\n",
@@ -1368,10 +1376,21 @@ static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
13681376
}
13691377
}
13701378

1371-
if (host->hw_ver.major >= 3) {
1379+
if (dev_req_params->pwr_rx == FAST_MODE ||
1380+
dev_req_params->pwr_rx == FASTAUTO_MODE) {
1381+
if (host->hw_ver.major >= 3) {
1382+
ret = ufshcd_dme_configure_adapt(hba,
1383+
dev_req_params->gear_tx,
1384+
PA_INITIAL_ADAPT);
1385+
} else {
1386+
ret = ufshcd_dme_configure_adapt(hba,
1387+
dev_req_params->gear_tx,
1388+
PA_NO_ADAPT);
1389+
}
1390+
} else {
13721391
ret = ufshcd_dme_configure_adapt(hba,
1373-
dev_req_params->gear_tx,
1374-
PA_INITIAL_ADAPT);
1392+
dev_req_params->gear_tx,
1393+
PA_NO_ADAPT);
13751394
}
13761395

13771396
return ret;

0 commit comments

Comments
 (0)