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ij-intelbp3tk0v
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x86/pci/intel_mid_pci: Fix PCIBIOS_* return code handling
intel_mid_pci_irq_enable() uses pci_read_config_byte() that returns PCIBIOS_* codes. The error handling, however, assumes the codes are normal errnos because it checks for < 0. intel_mid_pci_irq_enable() also returns the PCIBIOS_* code back to the caller but the function is used as the (*pcibios_enable_irq) function which should return normal errnos. Convert the error check to plain non-zero check which works for PCIBIOS_* return codes and convert the PCIBIOS_* return code using pcibios_err_to_errno() into normal errno before returning it. Fixes: 5b395e2 ("x86/platform/intel-mid: Make IRQ allocation a bit more flexible") Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20240527125538.13620-2-ilpo.jarvinen@linux.intel.com
1 parent ec0b4c4 commit 7248520

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Lines changed: 2 additions & 2 deletions

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arch/x86/pci/intel_mid_pci.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -233,9 +233,9 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
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return 0;
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ret = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
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if (ret < 0) {
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if (ret) {
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dev_warn(&dev->dev, "Failed to read interrupt line: %d\n", ret);
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return ret;
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return pcibios_err_to_errno(ret);
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}
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id = x86_match_cpu(intel_mid_cpu_ids);

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