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spi: spi-fsl-dspi: Target mode improvements
Merge series from James Clark <james.clark@linaro.org>: Improve usability of target mode by reporting FIFO errors and increasing the buffer size when DMA is used. While we're touching DMA stuff also switch to non-coherent memory, although this is unrelated to target mode. With the combination of the commit to increase the DMA buffer size and the commit to use non-coherent memory, the host mode performance figures are as follows on S32G3: # spidev_test --device /dev/spidev1.0 --bpw 8 --size <test_size> --cpha --iter 10000000 --speed 10000000 Coherent (4096 byte transfers): 6534 kbps Non-coherent: 7347 kbps Coherent (16 byte transfers): 447 kbps Non-coherent: 448 kbps Just for comparison running the same test in XSPI mode: 4096 byte transfers: 2143 kbps 16 byte transfers: 637 kbps These tests required hacking S32G3 to use DMA in host mode, although the figures should be representative of target mode too where DMA is used. And the other devices that use DMA in host mode should see similar improvements.
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.mailmap

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Douglas Gilbert <dougg@torque.net>
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Drew Fustini <fustini@kernel.org> <drew@pdp7.com>
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<duje@dujemihanovic.xyz> <duje.mihanovic@skole.hr>
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Easwar Hariharan <easwar.hariharan@linux.microsoft.com> <easwar.hariharan@intel.com>
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Easwar Hariharan <easwar.hariharan@linux.microsoft.com> <eahariha@linux.microsoft.com>
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Ed L. Cashin <ecashin@coraid.com>
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Elliot Berman <quic_eberman@quicinc.com> <eberman@codeaurora.org>
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Enric Balletbo i Serra <eballetbo@kernel.org> <enric.balletbo@collabora.com>

CREDITS

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N: Boris Pismenny
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D: Kernel TLS implementation and offload support.
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N: Dave Watson
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D: Kernel TLS implementation.
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Documentation/admin-guide/cgroup-v2.rst

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Controlling Controllers
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Documentation/admin-guide/hw-vuln/attack_vector_controls.rst

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SSB (Note 4)
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=============== ============== ============ ============= ============== ============ ========
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3 -- Disables SMT if cross-thread mitigations are fully enabled, the CPU is
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vulnerable, and STIBP is not supported
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4 -- Speculative store bypass is always enabled by default (no kernel
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mitigation applied) unless overridden with spec_store_bypass_disable option
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Documentation/core-api/symbol-namespaces.rst

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Using the EXPORT_SYMBOL_GPL_FOR_MODULES() macro
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Using the EXPORT_SYMBOL_FOR_MODULES() macro
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Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml

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Documentation/devicetree/bindings/regulator/infineon,ir38060.yaml

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Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml

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Documentation/devicetree/bindings/vendor-prefixes.yaml

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description: Beijing ESWIN Technology Group Co. Ltd.
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Documentation/networking/mptcp-sysctl.rst

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