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jnikulajnikula
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drm/i915/wm: convert intel_wm.h external interfaces to struct intel_display
Going forward, struct intel_display is the main display device data pointer. Convert the intel_wm.h interface as well as the hooks in struct intel_wm_funcs to struct intel_display. Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/1085900b4e46bbb514e6918c321639ac380331ce.1744119460.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
1 parent cdbf0e1 commit 788f205

9 files changed

Lines changed: 80 additions & 68 deletions

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‎drivers/gpu/drm/i915/display/i9xx_wm.c‎

Lines changed: 31 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -641,8 +641,9 @@ static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv)
641641
return enabled;
642642
}
643643

644-
static void pnv_update_wm(struct drm_i915_private *dev_priv)
644+
static void pnv_update_wm(struct intel_display *display)
645645
{
646+
struct drm_i915_private *dev_priv = to_i915(display->drm);
646647
struct intel_crtc *crtc;
647648
const struct cxsr_latency *latency;
648649
u32 reg;
@@ -2123,8 +2124,9 @@ static void vlv_optimize_watermarks(struct intel_atomic_state *state,
21232124
mutex_unlock(&dev_priv->display.wm.wm_mutex);
21242125
}
21252126

2126-
static void i965_update_wm(struct drm_i915_private *dev_priv)
2127+
static void i965_update_wm(struct intel_display *display)
21272128
{
2129+
struct drm_i915_private *dev_priv = to_i915(display->drm);
21282130
struct intel_crtc *crtc;
21292131
int srwm = 1;
21302132
int cursor_sr = 16;
@@ -2216,8 +2218,9 @@ static struct intel_crtc *intel_crtc_for_plane(struct drm_i915_private *i915,
22162218
return NULL;
22172219
}
22182220

2219-
static void i9xx_update_wm(struct drm_i915_private *dev_priv)
2221+
static void i9xx_update_wm(struct intel_display *display)
22202222
{
2223+
struct drm_i915_private *dev_priv = to_i915(display->drm);
22212224
const struct intel_watermark_params *wm_info;
22222225
u32 fwater_lo;
22232226
u32 fwater_hi;
@@ -2359,8 +2362,9 @@ static void i9xx_update_wm(struct drm_i915_private *dev_priv)
23592362
intel_set_memory_cxsr(dev_priv, true);
23602363
}
23612364

2362-
static void i845_update_wm(struct drm_i915_private *dev_priv)
2365+
static void i845_update_wm(struct intel_display *display)
23632366
{
2367+
struct drm_i915_private *dev_priv = to_i915(display->drm);
23642368
struct intel_crtc *crtc;
23652369
u32 fwater_lo;
23662370
int planea_wm;
@@ -2813,6 +2817,7 @@ static bool ilk_increase_wm_latency(struct drm_i915_private *dev_priv,
28132817

28142818
static void snb_wm_latency_quirk(struct drm_i915_private *dev_priv)
28152819
{
2820+
struct intel_display *display = &dev_priv->display;
28162821
bool changed;
28172822

28182823
/*
@@ -2828,13 +2833,14 @@ static void snb_wm_latency_quirk(struct drm_i915_private *dev_priv)
28282833

28292834
drm_dbg_kms(&dev_priv->drm,
28302835
"WM latency values increased to avoid potential underruns\n");
2831-
intel_print_wm_latency(dev_priv, "Primary", dev_priv->display.wm.pri_latency);
2832-
intel_print_wm_latency(dev_priv, "Sprite", dev_priv->display.wm.spr_latency);
2833-
intel_print_wm_latency(dev_priv, "Cursor", dev_priv->display.wm.cur_latency);
2836+
intel_print_wm_latency(display, "Primary", dev_priv->display.wm.pri_latency);
2837+
intel_print_wm_latency(display, "Sprite", dev_priv->display.wm.spr_latency);
2838+
intel_print_wm_latency(display, "Cursor", dev_priv->display.wm.cur_latency);
28342839
}
28352840

28362841
static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv)
28372842
{
2843+
struct intel_display *display = &dev_priv->display;
28382844
/*
28392845
* On some SNB machines (Thinkpad X220 Tablet at least)
28402846
* LP3 usage can cause vblank interrupts to be lost.
@@ -2857,13 +2863,15 @@ static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv)
28572863

28582864
drm_dbg_kms(&dev_priv->drm,
28592865
"LP3 watermarks disabled due to potential for lost interrupts\n");
2860-
intel_print_wm_latency(dev_priv, "Primary", dev_priv->display.wm.pri_latency);
2861-
intel_print_wm_latency(dev_priv, "Sprite", dev_priv->display.wm.spr_latency);
2862-
intel_print_wm_latency(dev_priv, "Cursor", dev_priv->display.wm.cur_latency);
2866+
intel_print_wm_latency(display, "Primary", dev_priv->display.wm.pri_latency);
2867+
intel_print_wm_latency(display, "Sprite", dev_priv->display.wm.spr_latency);
2868+
intel_print_wm_latency(display, "Cursor", dev_priv->display.wm.cur_latency);
28632869
}
28642870

28652871
static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
28662872
{
2873+
struct intel_display *display = &dev_priv->display;
2874+
28672875
if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
28682876
hsw_read_wm_latency(dev_priv, dev_priv->display.wm.pri_latency);
28692877
else if (DISPLAY_VER(dev_priv) >= 6)
@@ -2879,9 +2887,9 @@ static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
28792887
intel_fixup_spr_wm_latency(dev_priv, dev_priv->display.wm.spr_latency);
28802888
intel_fixup_cur_wm_latency(dev_priv, dev_priv->display.wm.cur_latency);
28812889

2882-
intel_print_wm_latency(dev_priv, "Primary", dev_priv->display.wm.pri_latency);
2883-
intel_print_wm_latency(dev_priv, "Sprite", dev_priv->display.wm.spr_latency);
2884-
intel_print_wm_latency(dev_priv, "Cursor", dev_priv->display.wm.cur_latency);
2890+
intel_print_wm_latency(display, "Primary", dev_priv->display.wm.pri_latency);
2891+
intel_print_wm_latency(display, "Sprite", dev_priv->display.wm.spr_latency);
2892+
intel_print_wm_latency(display, "Cursor", dev_priv->display.wm.cur_latency);
28852893

28862894
if (DISPLAY_VER(dev_priv) == 6) {
28872895
snb_wm_latency_quirk(dev_priv);
@@ -3759,8 +3767,9 @@ static void vlv_read_wm_values(struct drm_i915_private *dev_priv,
37593767
#undef _FW_WM
37603768
#undef _FW_WM_VLV
37613769

3762-
static void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
3770+
static void g4x_wm_get_hw_state(struct intel_display *display)
37633771
{
3772+
struct drm_i915_private *dev_priv = to_i915(display->drm);
37643773
struct g4x_wm_values *wm = &dev_priv->display.wm.g4x;
37653774
struct intel_crtc *crtc;
37663775

@@ -3852,9 +3861,9 @@ static void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
38523861
str_yes_no(wm->fbc_en));
38533862
}
38543863

3855-
static void g4x_wm_sanitize(struct drm_i915_private *dev_priv)
3864+
static void g4x_wm_sanitize(struct intel_display *display)
38563865
{
3857-
struct intel_display *display = &dev_priv->display;
3866+
struct drm_i915_private *dev_priv = to_i915(display->drm);
38583867
struct intel_plane *plane;
38593868
struct intel_crtc *crtc;
38603869

@@ -3902,8 +3911,9 @@ static void g4x_wm_sanitize(struct drm_i915_private *dev_priv)
39023911
mutex_unlock(&dev_priv->display.wm.wm_mutex);
39033912
}
39043913

3905-
static void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv)
3914+
static void vlv_wm_get_hw_state(struct intel_display *display)
39063915
{
3916+
struct drm_i915_private *dev_priv = to_i915(display->drm);
39073917
struct vlv_wm_values *wm = &dev_priv->display.wm.vlv;
39083918
struct intel_crtc *crtc;
39093919
u32 val;
@@ -4002,9 +4012,9 @@ static void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv)
40024012
wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr);
40034013
}
40044014

4005-
static void vlv_wm_sanitize(struct drm_i915_private *dev_priv)
4015+
static void vlv_wm_sanitize(struct intel_display *display)
40064016
{
4007-
struct intel_display *display = &dev_priv->display;
4017+
struct drm_i915_private *dev_priv = to_i915(display->drm);
40084018
struct intel_plane *plane;
40094019
struct intel_crtc *crtc;
40104020

@@ -4065,8 +4075,9 @@ static void ilk_init_lp_watermarks(struct drm_i915_private *dev_priv)
40654075
*/
40664076
}
40674077

4068-
static void ilk_wm_get_hw_state(struct drm_i915_private *dev_priv)
4078+
static void ilk_wm_get_hw_state(struct intel_display *display)
40694079
{
4080+
struct drm_i915_private *dev_priv = to_i915(display->drm);
40704081
struct ilk_wm_values *hw = &dev_priv->display.wm.hw;
40714082
struct intel_crtc *crtc;
40724083

‎drivers/gpu/drm/i915/display/intel_display.c‎

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1054,7 +1054,7 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
10541054
intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits);
10551055

10561056
if (new_crtc_state->update_wm_post && new_crtc_state->hw.active)
1057-
intel_update_watermarks(dev_priv);
1057+
intel_update_watermarks(display);
10581058

10591059
intel_fbc_post_update(state, crtc);
10601060

@@ -1258,7 +1258,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
12581258
*/
12591259
if (!intel_initial_watermarks(state, crtc))
12601260
if (new_crtc_state->update_wm_pre)
1261-
intel_update_watermarks(dev_priv);
1261+
intel_update_watermarks(display);
12621262
}
12631263

12641264
/*
@@ -2072,7 +2072,6 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state,
20722072
struct intel_display *display = to_intel_display(crtc);
20732073
const struct intel_crtc_state *new_crtc_state =
20742074
intel_atomic_get_new_crtc_state(state, crtc);
2075-
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
20762075
enum pipe pipe = crtc->pipe;
20772076

20782077
if (drm_WARN_ON(display->drm, crtc->active))
@@ -2096,7 +2095,7 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state,
20962095
intel_color_modeset(new_crtc_state);
20972096

20982097
if (!intel_initial_watermarks(state, crtc))
2099-
intel_update_watermarks(dev_priv);
2098+
intel_update_watermarks(display);
21002099
intel_enable_transcoder(new_crtc_state);
21012100

21022101
intel_crtc_vblank_on(new_crtc_state);
@@ -2112,7 +2111,6 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state,
21122111
struct intel_crtc *crtc)
21132112
{
21142113
struct intel_display *display = to_intel_display(state);
2115-
struct drm_i915_private *dev_priv = to_i915(display->drm);
21162114
struct intel_crtc_state *old_crtc_state =
21172115
intel_atomic_get_old_crtc_state(state, crtc);
21182116
enum pipe pipe = crtc->pipe;
@@ -2149,7 +2147,7 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state,
21492147
intel_set_cpu_fifo_underrun_reporting(display, pipe, false);
21502148

21512149
if (!display->funcs.wm->initial_watermarks)
2152-
intel_update_watermarks(dev_priv);
2150+
intel_update_watermarks(display);
21532151

21542152
/* clock the pipe down to 640x480@60 to potentially save power */
21552153
if (display->platform.i830)

‎drivers/gpu/drm/i915/display/intel_display_core.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,7 @@ struct intel_display_funcs {
8080
/* functions used for watermark calcs for display. */
8181
struct intel_wm_funcs {
8282
/* update_wm is for legacy wm management */
83-
void (*update_wm)(struct drm_i915_private *dev_priv);
83+
void (*update_wm)(struct intel_display *display);
8484
int (*compute_watermarks)(struct intel_atomic_state *state,
8585
struct intel_crtc *crtc);
8686
void (*initial_watermarks)(struct intel_atomic_state *state,
@@ -90,8 +90,8 @@ struct intel_wm_funcs {
9090
void (*optimize_watermarks)(struct intel_atomic_state *state,
9191
struct intel_crtc *crtc);
9292
int (*compute_global_watermarks)(struct intel_atomic_state *state);
93-
void (*get_hw_state)(struct drm_i915_private *i915);
94-
void (*sanitize)(struct drm_i915_private *i915);
93+
void (*get_hw_state)(struct intel_display *display);
94+
void (*sanitize)(struct intel_display *display);
9595
};
9696

9797
struct intel_audio_state {

‎drivers/gpu/drm/i915/display/intel_display_debugfs.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -826,7 +826,6 @@ static const struct drm_info_list intel_display_debugfs_list[] = {
826826

827827
void intel_display_debugfs_register(struct intel_display *display)
828828
{
829-
struct drm_i915_private *i915 = to_i915(display->drm);
830829
struct drm_minor *minor = display->drm->primary;
831830

832831
debugfs_create_file("i915_fifo_underrun_reset", 0644, minor->debugfs_root,
@@ -844,7 +843,7 @@ void intel_display_debugfs_register(struct intel_display *display)
844843
intel_hpd_debugfs_register(display);
845844
intel_opregion_debugfs_register(display);
846845
intel_psr_debugfs_register(display);
847-
intel_wm_debugfs_register(i915);
846+
intel_wm_debugfs_register(display);
848847
intel_display_debugfs_params(display);
849848
}
850849

‎drivers/gpu/drm/i915/display/intel_display_driver.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -422,7 +422,7 @@ int intel_display_driver_probe_nogem(struct intel_display *display)
422422
if (!HAS_DISPLAY(display))
423423
return 0;
424424

425-
intel_wm_init(i915);
425+
intel_wm_init(display);
426426

427427
intel_panel_sanitize_ssc(display);
428428

‎drivers/gpu/drm/i915/display/intel_modeset_setup.c‎

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -155,9 +155,8 @@ static void reset_crtc_encoder_state(struct intel_crtc *crtc)
155155
static void intel_crtc_disable_noatomic_complete(struct intel_crtc *crtc)
156156
{
157157
struct intel_display *display = to_intel_display(crtc);
158-
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
159158
struct intel_pmdemand_state *pmdemand_state =
160-
to_intel_pmdemand_state(i915->display.pmdemand.obj.state);
159+
to_intel_pmdemand_state(display->pmdemand.obj.state);
161160
struct intel_crtc_state *crtc_state =
162161
to_intel_crtc_state(crtc->base.state);
163162
enum pipe pipe = crtc->pipe;
@@ -169,7 +168,7 @@ static void intel_crtc_disable_noatomic_complete(struct intel_crtc *crtc)
169168
reset_crtc_encoder_state(crtc);
170169

171170
intel_fbc_disable(crtc);
172-
intel_update_watermarks(i915);
171+
intel_update_watermarks(display);
173172

174173
intel_display_power_put_all_in_set(display, &crtc->enabled_power_domains);
175174

@@ -874,7 +873,7 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915)
874873

875874
/* TODO move here (or even earlier?) on all platforms */
876875
if (DISPLAY_VER(display) >= 9)
877-
intel_wm_get_hw_state(i915);
876+
intel_wm_get_hw_state(display);
878877

879878
intel_bw_update_hw_state(display);
880879
intel_cdclk_update_hw_state(display);
@@ -988,8 +987,8 @@ void intel_modeset_setup_hw_state(struct drm_i915_private *i915,
988987

989988
/* TODO move earlier on all platforms */
990989
if (DISPLAY_VER(display) < 9)
991-
intel_wm_get_hw_state(i915);
992-
intel_wm_sanitize(i915);
990+
intel_wm_get_hw_state(display);
991+
intel_wm_sanitize(display);
993992

994993
for_each_intel_crtc(&i915->drm, crtc) {
995994
struct intel_crtc_state *crtc_state =

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