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airliedairlied
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Merge tag 'amd-drm-fixes-6.10-2024-06-26' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes
amd-drm-fixes-6.10-2024-06-26: amdgpu: - SMU 14.x fix - vram info parsing fix - mode1 reset fix - LTTPR fix - Virtual display fix - Avoid spurious error in PSP init Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240626221408.2019633-1-alexander.deucher@amd.com
2 parents 5fed085 + 48880f9 commit 7a1b3f3

12 files changed

Lines changed: 156 additions & 15 deletions

File tree

‎drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -400,7 +400,7 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
400400
mem_channel_number = vram_info->v30.channel_num;
401401
mem_channel_width = vram_info->v30.channel_width;
402402
if (vram_width)
403-
*vram_width = mem_channel_number * (1 << mem_channel_width);
403+
*vram_width = mem_channel_number * 16;
404404
break;
405405
default:
406406
return -EINVAL;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5220,11 +5220,14 @@ int amdgpu_device_mode1_reset(struct amdgpu_device *adev)
52205220

52215221
dev_info(adev->dev, "GPU mode1 reset\n");
52225222

5223+
/* Cache the state before bus master disable. The saved config space
5224+
* values are used in other cases like restore after mode-2 reset.
5225+
*/
5226+
amdgpu_device_cache_pci_state(adev->pdev);
5227+
52235228
/* disable BM */
52245229
pci_clear_master(adev->pdev);
52255230

5226-
amdgpu_device_cache_pci_state(adev->pdev);
5227-
52285231
if (amdgpu_dpm_is_mode1_reset_supported(adev)) {
52295232
dev_info(adev->dev, "GPU smu mode1 reset\n");
52305233
ret = amdgpu_dpm_mode1_reset(adev);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c‎

Lines changed: 21 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -640,6 +640,20 @@ static const char *psp_gfx_cmd_name(enum psp_gfx_cmd_id cmd_id)
640640
}
641641
}
642642

643+
static bool psp_err_warn(struct psp_context *psp)
644+
{
645+
struct psp_gfx_cmd_resp *cmd = psp->cmd_buf_mem;
646+
647+
/* This response indicates reg list is already loaded */
648+
if (amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 2) &&
649+
cmd->cmd_id == GFX_CMD_ID_LOAD_IP_FW &&
650+
cmd->cmd.cmd_load_ip_fw.fw_type == GFX_FW_TYPE_REG_LIST &&
651+
cmd->resp.status == TEE_ERROR_CANCEL)
652+
return false;
653+
654+
return true;
655+
}
656+
643657
static int
644658
psp_cmd_submit_buf(struct psp_context *psp,
645659
struct amdgpu_firmware_info *ucode,
@@ -699,10 +713,13 @@ psp_cmd_submit_buf(struct psp_context *psp,
699713
dev_warn(psp->adev->dev,
700714
"failed to load ucode %s(0x%X) ",
701715
amdgpu_ucode_name(ucode->ucode_id), ucode->ucode_id);
702-
dev_warn(psp->adev->dev,
703-
"psp gfx command %s(0x%X) failed and response status is (0x%X)\n",
704-
psp_gfx_cmd_name(psp->cmd_buf_mem->cmd_id), psp->cmd_buf_mem->cmd_id,
705-
psp->cmd_buf_mem->resp.status);
716+
if (psp_err_warn(psp))
717+
dev_warn(
718+
psp->adev->dev,
719+
"psp gfx command %s(0x%X) failed and response status is (0x%X)\n",
720+
psp_gfx_cmd_name(psp->cmd_buf_mem->cmd_id),
721+
psp->cmd_buf_mem->cmd_id,
722+
psp->cmd_buf_mem->resp.status);
706723
/* If any firmware (including CAP) load fails under SRIOV, it should
707724
* return failure to stop the VF from initializing.
708725
* Also return failure in case of timeout

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c‎

Lines changed: 16 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,7 @@
33
#include <drm/drm_atomic_helper.h>
44
#include <drm/drm_edid.h>
55
#include <drm/drm_simple_kms_helper.h>
6+
#include <drm/drm_gem_framebuffer_helper.h>
67
#include <drm/drm_vblank.h>
78

89
#include "amdgpu.h"
@@ -314,7 +315,13 @@ static int amdgpu_vkms_prepare_fb(struct drm_plane *plane,
314315
return 0;
315316
}
316317
afb = to_amdgpu_framebuffer(new_state->fb);
317-
obj = new_state->fb->obj[0];
318+
319+
obj = drm_gem_fb_get_obj(new_state->fb, 0);
320+
if (!obj) {
321+
DRM_ERROR("Failed to get obj from framebuffer\n");
322+
return -EINVAL;
323+
}
324+
318325
rbo = gem_to_amdgpu_bo(obj);
319326
adev = amdgpu_ttm_adev(rbo->tbo.bdev);
320327

@@ -368,12 +375,19 @@ static void amdgpu_vkms_cleanup_fb(struct drm_plane *plane,
368375
struct drm_plane_state *old_state)
369376
{
370377
struct amdgpu_bo *rbo;
378+
struct drm_gem_object *obj;
371379
int r;
372380

373381
if (!old_state->fb)
374382
return;
375383

376-
rbo = gem_to_amdgpu_bo(old_state->fb->obj[0]);
384+
obj = drm_gem_fb_get_obj(old_state->fb, 0);
385+
if (!obj) {
386+
DRM_ERROR("Failed to get obj from framebuffer\n");
387+
return;
388+
}
389+
390+
rbo = gem_to_amdgpu_bo(obj);
377391
r = amdgpu_bo_reserve(rbo, false);
378392
if (unlikely(r)) {
379393
DRM_ERROR("failed to reserve rbo before unpin\n");

‎drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -464,8 +464,9 @@ struct psp_gfx_rb_frame
464464
#define PSP_ERR_UNKNOWN_COMMAND 0x00000100
465465

466466
enum tee_error_code {
467-
TEE_SUCCESS = 0x00000000,
468-
TEE_ERROR_NOT_SUPPORTED = 0xFFFF000A,
467+
TEE_SUCCESS = 0x00000000,
468+
TEE_ERROR_CANCEL = 0xFFFF0002,
469+
TEE_ERROR_NOT_SUPPORTED = 0xFFFF000A,
469470
};
470471

471472
#endif /* _PSP_TEE_GFX_IF_H_ */

‎drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c‎

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1590,9 +1590,17 @@ static bool retrieve_link_cap(struct dc_link *link)
15901590
return false;
15911591
}
15921592

1593-
if (dp_is_lttpr_present(link))
1593+
if (dp_is_lttpr_present(link)) {
15941594
configure_lttpr_mode_transparent(link);
15951595

1596+
// Echo TOTAL_LTTPR_CNT back downstream
1597+
core_link_write_dpcd(
1598+
link,
1599+
DP_TOTAL_LTTPR_CNT,
1600+
&link->dpcd_caps.lttpr_caps.phy_repeater_cnt,
1601+
sizeof(link->dpcd_caps.lttpr_caps.phy_repeater_cnt));
1602+
}
1603+
15961604
/* Read DP tunneling information. */
15971605
status = dpcd_get_tunneling_device_data(link);
15981606

‎drivers/gpu/drm/amd/display/include/dpcd_defs.h‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -177,4 +177,9 @@ enum dpcd_psr_sink_states {
177177
#define DP_SINK_PR_PIXEL_DEVIATION_PER_LINE 0x379
178178
#define DP_SINK_PR_MAX_NUMBER_OF_DEVIATION_LINE 0x37A
179179

180+
/* Remove once drm_dp_helper.h is updated upstream */
181+
#ifndef DP_TOTAL_LTTPR_CNT
182+
#define DP_TOTAL_LTTPR_CNT 0xF000A /* 2.1 */
183+
#endif
184+
180185
#endif /* __DAL_DPCD_DEFS_H__ */

‎drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c‎

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -324,6 +324,18 @@ static int smu_dpm_set_umsch_mm_enable(struct smu_context *smu,
324324
return ret;
325325
}
326326

327+
static int smu_set_mall_enable(struct smu_context *smu)
328+
{
329+
int ret = 0;
330+
331+
if (!smu->ppt_funcs->set_mall_enable)
332+
return 0;
333+
334+
ret = smu->ppt_funcs->set_mall_enable(smu);
335+
336+
return ret;
337+
}
338+
327339
/**
328340
* smu_dpm_set_power_gate - power gate/ungate the specific IP block
329341
*
@@ -1791,6 +1803,7 @@ static int smu_hw_init(void *handle)
17911803
smu_dpm_set_jpeg_enable(smu, true);
17921804
smu_dpm_set_vpe_enable(smu, true);
17931805
smu_dpm_set_umsch_mm_enable(smu, true);
1806+
smu_set_mall_enable(smu);
17941807
smu_set_gfx_cgpg(smu, true);
17951808
}
17961809

‎drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1394,6 +1394,11 @@ struct pptable_funcs {
13941394
*/
13951395
int (*dpm_set_umsch_mm_enable)(struct smu_context *smu, bool enable);
13961396

1397+
/**
1398+
* @set_mall_enable: Init MALL power gating control.
1399+
*/
1400+
int (*set_mall_enable)(struct smu_context *smu);
1401+
13971402
/**
13981403
* @notify_rlc_state: Notify RLC power state to SMU.
13991404
*/

‎drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v14_0_0_ppsmc.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -106,8 +106,8 @@
106106
#define PPSMC_MSG_DisableLSdma 0x35 ///< Disable LSDMA
107107
#define PPSMC_MSG_SetSoftMaxVpe 0x36 ///<
108108
#define PPSMC_MSG_SetSoftMinVpe 0x37 ///<
109-
#define PPSMC_MSG_AllocMALLCache 0x38 ///< Allocating MALL Cache
110-
#define PPSMC_MSG_ReleaseMALLCache 0x39 ///< Releasing MALL Cache
109+
#define PPSMC_MSG_MALLPowerController 0x38 ///< Set MALL control
110+
#define PPSMC_MSG_MALLPowerState 0x39 ///< Enter/Exit MALL PG
111111
#define PPSMC_Message_Count 0x3A ///< Total number of PPSMC messages
112112
/** @}*/
113113

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