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Commit 8406b56

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Merge branch 'mlxsw-fixes'
Petr Machata says: ==================== mlxsw: Fixes This patchset fixes an issue with mlxsw driver initialization, and a memory corruption issue in shared buffer occupancy handling. v3: - Drop the core thermal fix, it's not relevant anymore. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2 parents 11b006d + c28947d commit 8406b56

3 files changed

Lines changed: 31 additions & 9 deletions

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drivers/net/ethernet/mellanox/mlxsw/pci.c

Lines changed: 15 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1594,18 +1594,25 @@ static int mlxsw_pci_sys_ready_wait(struct mlxsw_pci *mlxsw_pci,
15941594
return -EBUSY;
15951595
}
15961596

1597-
static int mlxsw_pci_reset_at_pci_disable(struct mlxsw_pci *mlxsw_pci)
1597+
static int mlxsw_pci_reset_at_pci_disable(struct mlxsw_pci *mlxsw_pci,
1598+
bool pci_reset_sbr_supported)
15981599
{
15991600
struct pci_dev *pdev = mlxsw_pci->pdev;
16001601
char mrsr_pl[MLXSW_REG_MRSR_LEN];
16011602
int err;
16021603

1604+
if (!pci_reset_sbr_supported) {
1605+
pci_dbg(pdev, "Performing PCI hot reset instead of \"all reset\"\n");
1606+
goto sbr;
1607+
}
1608+
16031609
mlxsw_reg_mrsr_pack(mrsr_pl,
16041610
MLXSW_REG_MRSR_COMMAND_RESET_AT_PCI_DISABLE);
16051611
err = mlxsw_reg_write(mlxsw_pci->core, MLXSW_REG(mrsr), mrsr_pl);
16061612
if (err)
16071613
return err;
16081614

1615+
sbr:
16091616
device_lock_assert(&pdev->dev);
16101617

16111618
pci_cfg_access_lock(pdev);
@@ -1633,6 +1640,7 @@ static int
16331640
mlxsw_pci_reset(struct mlxsw_pci *mlxsw_pci, const struct pci_device_id *id)
16341641
{
16351642
struct pci_dev *pdev = mlxsw_pci->pdev;
1643+
bool pci_reset_sbr_supported = false;
16361644
char mcam_pl[MLXSW_REG_MCAM_LEN];
16371645
bool pci_reset_supported = false;
16381646
u32 sys_status;
@@ -1652,13 +1660,17 @@ mlxsw_pci_reset(struct mlxsw_pci *mlxsw_pci, const struct pci_device_id *id)
16521660
mlxsw_reg_mcam_pack(mcam_pl,
16531661
MLXSW_REG_MCAM_FEATURE_GROUP_ENHANCED_FEATURES);
16541662
err = mlxsw_reg_query(mlxsw_pci->core, MLXSW_REG(mcam), mcam_pl);
1655-
if (!err)
1663+
if (!err) {
16561664
mlxsw_reg_mcam_unpack(mcam_pl, MLXSW_REG_MCAM_PCI_RESET,
16571665
&pci_reset_supported);
1666+
mlxsw_reg_mcam_unpack(mcam_pl, MLXSW_REG_MCAM_PCI_RESET_SBR,
1667+
&pci_reset_sbr_supported);
1668+
}
16581669

16591670
if (pci_reset_supported) {
16601671
pci_dbg(pdev, "Starting PCI reset flow\n");
1661-
err = mlxsw_pci_reset_at_pci_disable(mlxsw_pci);
1672+
err = mlxsw_pci_reset_at_pci_disable(mlxsw_pci,
1673+
pci_reset_sbr_supported);
16621674
} else {
16631675
pci_dbg(pdev, "Starting software reset flow\n");
16641676
err = mlxsw_pci_reset_sw(mlxsw_pci);

drivers/net/ethernet/mellanox/mlxsw/reg.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10671,6 +10671,8 @@ enum mlxsw_reg_mcam_mng_feature_cap_mask_bits {
1067110671
MLXSW_REG_MCAM_MCIA_128B = 34,
1067210672
/* If set, MRSR.command=6 is supported. */
1067310673
MLXSW_REG_MCAM_PCI_RESET = 48,
10674+
/* If set, MRSR.command=6 is supported with Secondary Bus Reset. */
10675+
MLXSW_REG_MCAM_PCI_RESET_SBR = 67,
1067410676
};
1067510677

1067610678
#define MLXSW_REG_BYTES_PER_DWORD 0x4

drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c

Lines changed: 14 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1607,8 +1607,8 @@ static void mlxsw_sp_sb_sr_occ_query_cb(struct mlxsw_core *mlxsw_core,
16071607
int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
16081608
unsigned int sb_index)
16091609
{
1610+
u16 local_port, local_port_1, first_local_port, last_local_port;
16101611
struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
1611-
u16 local_port, local_port_1, last_local_port;
16121612
struct mlxsw_sp_sb_sr_occ_query_cb_ctx cb_ctx;
16131613
u8 masked_count, current_page = 0;
16141614
unsigned long cb_priv = 0;
@@ -1628,6 +1628,7 @@ int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
16281628
masked_count = 0;
16291629
mlxsw_reg_sbsr_pack(sbsr_pl, false);
16301630
mlxsw_reg_sbsr_port_page_set(sbsr_pl, current_page);
1631+
first_local_port = current_page * MLXSW_REG_SBSR_NUM_PORTS_IN_PAGE;
16311632
last_local_port = current_page * MLXSW_REG_SBSR_NUM_PORTS_IN_PAGE +
16321633
MLXSW_REG_SBSR_NUM_PORTS_IN_PAGE - 1;
16331634

@@ -1645,9 +1646,12 @@ int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
16451646
if (local_port != MLXSW_PORT_CPU_PORT) {
16461647
/* Ingress quotas are not supported for the CPU port */
16471648
mlxsw_reg_sbsr_ingress_port_mask_set(sbsr_pl,
1648-
local_port, 1);
1649+
local_port - first_local_port,
1650+
1);
16491651
}
1650-
mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl, local_port, 1);
1652+
mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl,
1653+
local_port - first_local_port,
1654+
1);
16511655
for (i = 0; i < mlxsw_sp->sb_vals->pool_count; i++) {
16521656
err = mlxsw_sp_sb_pm_occ_query(mlxsw_sp, local_port, i,
16531657
&bulk_list);
@@ -1684,7 +1688,7 @@ int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
16841688
unsigned int sb_index)
16851689
{
16861690
struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
1687-
u16 local_port, last_local_port;
1691+
u16 local_port, first_local_port, last_local_port;
16881692
LIST_HEAD(bulk_list);
16891693
unsigned int masked_count;
16901694
u8 current_page = 0;
@@ -1702,6 +1706,7 @@ int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
17021706
masked_count = 0;
17031707
mlxsw_reg_sbsr_pack(sbsr_pl, true);
17041708
mlxsw_reg_sbsr_port_page_set(sbsr_pl, current_page);
1709+
first_local_port = current_page * MLXSW_REG_SBSR_NUM_PORTS_IN_PAGE;
17051710
last_local_port = current_page * MLXSW_REG_SBSR_NUM_PORTS_IN_PAGE +
17061711
MLXSW_REG_SBSR_NUM_PORTS_IN_PAGE - 1;
17071712

@@ -1719,9 +1724,12 @@ int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
17191724
if (local_port != MLXSW_PORT_CPU_PORT) {
17201725
/* Ingress quotas are not supported for the CPU port */
17211726
mlxsw_reg_sbsr_ingress_port_mask_set(sbsr_pl,
1722-
local_port, 1);
1727+
local_port - first_local_port,
1728+
1);
17231729
}
1724-
mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl, local_port, 1);
1730+
mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl,
1731+
local_port - first_local_port,
1732+
1);
17251733
for (i = 0; i < mlxsw_sp->sb_vals->pool_count; i++) {
17261734
err = mlxsw_sp_sb_pm_occ_clear(mlxsw_sp, local_port, i,
17271735
&bulk_list);

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