Skip to content

Commit 8ef4178

Browse files
Anshuman Khandualctmarinas
authored andcommitted
arm64/mm: Change pgattr_change_is_safe() arguments as pteval_t
pgattr_change_is_safe() processes two distinct page table entries that just happen to be 64 bits for all levels. This changes both arguments to reflect the actual data type being processed in the function. This change is important when moving to FEAT_D128 based 128 bit page tables because it makes it simple to change the entry size in one place. Cc: Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ard Biesheuvel <ardb@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Ryan Roberts <ryan.roberts@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Link: https://lore.kernel.org/r/20241001045804.1119881-1-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
1 parent 9852d85 commit 8ef4178

2 files changed

Lines changed: 2 additions & 2 deletions

File tree

arch/arm64/include/asm/pgtable.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -338,7 +338,7 @@ static inline pte_t __ptep_get(pte_t *ptep)
338338
}
339339

340340
extern void __sync_icache_dcache(pte_t pteval);
341-
bool pgattr_change_is_safe(u64 old, u64 new);
341+
bool pgattr_change_is_safe(pteval_t old, pteval_t new);
342342

343343
/*
344344
* PTE bits configuration in the presence of hardware Dirty Bit Management

arch/arm64/mm/mmu.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -119,7 +119,7 @@ static phys_addr_t __init early_pgtable_alloc(int shift)
119119
return phys;
120120
}
121121

122-
bool pgattr_change_is_safe(u64 old, u64 new)
122+
bool pgattr_change_is_safe(pteval_t old, pteval_t new)
123123
{
124124
/*
125125
* The following mapping attributes may be updated in live

0 commit comments

Comments
 (0)