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Merge branch 'pci/pwrctrl-tc9563'
- Add a struct pci_ops.assert_perst() function pointer to assert/deassert PCIe PERST# and implement it for the qcom driver (Krishna Chaitanya Chundru) - Add DT binding and pwrctrl driver for the Toshiba TC9563 PCIe switch, which must be held in reset after poweron so the pwrctrl driver can configure the switch via I2C before bringing up the links (Krishna Chaitanya Chundru) * pci/pwrctrl-tc9563: PCI: pwrctrl: Add power control driver for TC9563 PCI: qcom: Implement .assert_perst() PCI: dwc: Implement .assert_perst() for dwc glue drivers PCI: Add .assert_perst() to control PCIe PERST# dt-bindings: PCI: Add binding for Toshiba TC9563 PCIe switch
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‎Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/toshiba,tc9563.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Toshiba TC9563 PCIe switch
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maintainers:
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- Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
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description: |
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Toshiba TC9563 PCIe switch has one upstream and three downstream ports.
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The 3rd downstream port has integrated endpoint device of Ethernet MAC.
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Other two downstream ports are supposed to connect to external device.
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The TC9563 PCIe switch can be configured through I2C interface before
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PCIe link is established to change FTS, ASPM related entry delays,
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tx amplitude etc for better power efficiency and functionality.
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properties:
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compatible:
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enum:
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- pci1179,0623
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reg:
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maxItems: 1
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resx-gpios:
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maxItems: 1
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description:
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GPIO controlling the RESX# pin.
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vdd18-supply: true
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vdd09-supply: true
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vddc-supply: true
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vddio1-supply: true
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vddio2-supply: true
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vddio18-supply: true
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i2c-parent:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description:
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A phandle to the parent I2C node and the slave address of the device
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used to configure tc9563 to change FTS, tx amplitude etc.
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items:
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- description: Phandle to the I2C controller node
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- description: I2C slave address
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patternProperties:
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"^pcie@[1-3],0$":
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description:
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child nodes describing the internal downstream ports of
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the tc9563 switch.
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type: object
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allOf:
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- $ref: "#/$defs/tc9563-node"
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- $ref: /schemas/pci/pci-pci-bridge.yaml#
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unevaluatedProperties: false
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$defs:
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tc9563-node:
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type: object
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properties:
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toshiba,tx-amplitude-microvolt:
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description:
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Change Tx Margin setting for low power consumption.
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toshiba,no-dfe-support:
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type: boolean
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description:
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Disable DFE (Decision Feedback Equalizer), which mitigates
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intersymbol interference and some reflections caused by
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impedance mismatches.
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required:
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- resx-gpios
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- vdd18-supply
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- vdd09-supply
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- vddc-supply
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- vddio1-supply
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- vddio2-supply
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- vddio18-supply
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- i2c-parent
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allOf:
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- $ref: "#/$defs/tc9563-node"
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- $ref: /schemas/pci/pci-bus-common.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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pcie {
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#address-cells = <3>;
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#size-cells = <2>;
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pcie@0 {
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device_type = "pci";
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reg = <0x0 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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bus-range = <0x01 0xff>;
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pcie@0,0 {
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compatible = "pci1179,0623";
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reg = <0x10000 0x0 0x0 0x0 0x0>;
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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bus-range = <0x02 0xff>;
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i2c-parent = <&qup_i2c 0x77>;
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vdd18-supply = <&vdd>;
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vdd09-supply = <&vdd>;
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vddc-supply = <&vdd>;
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vddio1-supply = <&vdd>;
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vddio2-supply = <&vdd>;
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vddio18-supply = <&vdd>;
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resx-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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pcie@1,0 {
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compatible = "pciclass,0604";
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reg = <0x20800 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges;
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bus-range = <0x03 0xff>;
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toshiba,no-dfe-support;
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};
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pcie@2,0 {
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compatible = "pciclass,0604";
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reg = <0x21000 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges;
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bus-range = <0x04 0xff>;
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};
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pcie@3,0 {
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compatible = "pciclass,0604";
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reg = <0x21800 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges;
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bus-range = <0x05 0xff>;
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toshiba,tx-amplitude-microvolt = <10>;
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ethernet@0,0 {
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reg = <0x50000 0x0 0x0 0x0 0x0>;
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};
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ethernet@0,1 {
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reg = <0x50100 0x0 0x0 0x0 0x0>;
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};
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};
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};
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};
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};

‎drivers/pci/controller/dwc/pcie-designware-host.c‎

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@@ -843,10 +843,19 @@ void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, unsigned int devfn,
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}
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EXPORT_SYMBOL_GPL(dw_pcie_own_conf_map_bus);
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static int dw_pcie_op_assert_perst(struct pci_bus *bus, bool assert)
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{
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struct dw_pcie_rp *pp = bus->sysdata;
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struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
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return dw_pcie_assert_perst(pci, assert);
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}
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static struct pci_ops dw_pcie_ops = {
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.map_bus = dw_pcie_own_conf_map_bus,
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.read = pci_generic_config_read,
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.write = pci_generic_config_write,
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.assert_perst = dw_pcie_op_assert_perst,
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};
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static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)

‎drivers/pci/controller/dwc/pcie-designware.h‎

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@@ -493,6 +493,7 @@ struct dw_pcie_ops {
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enum dw_pcie_ltssm (*get_ltssm)(struct dw_pcie *pcie);
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int (*start_link)(struct dw_pcie *pcie);
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void (*stop_link)(struct dw_pcie *pcie);
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int (*assert_perst)(struct dw_pcie *pcie, bool assert);
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};
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struct debugfs_info {
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pci->ops->stop_link(pci);
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}
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static inline int dw_pcie_assert_perst(struct dw_pcie *pci, bool assert)
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{
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if (pci->ops && pci->ops->assert_perst)
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return pci->ops->assert_perst(pci, assert);
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return 0;
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}
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static inline enum dw_pcie_ltssm dw_pcie_get_ltssm(struct dw_pcie *pci)
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{
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u32 val;

‎drivers/pci/controller/dwc/pcie-qcom.c‎

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return 0;
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}
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static int qcom_pcie_assert_perst(struct dw_pcie *pci, bool assert)
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{
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struct qcom_pcie *pcie = to_qcom_pcie(pci);
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if (assert)
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qcom_ep_reset_assert(pcie);
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else
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qcom_ep_reset_deassert(pcie);
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return 0;
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}
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static void qcom_pcie_2_3_2_ltssm_enable(struct qcom_pcie *pcie)
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{
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u32 val;
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static const struct dw_pcie_ops dw_pcie_ops = {
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.link_up = qcom_pcie_link_up,
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.start_link = qcom_pcie_start_link,
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.assert_perst = qcom_pcie_assert_perst,
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};
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static int qcom_pcie_icc_init(struct qcom_pcie *pcie)

‎drivers/pci/pwrctrl/Kconfig‎

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@@ -22,6 +22,21 @@ config PCI_PWRCTRL_SLOT
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PCI slots. The voltage regulators powering the rails of the PCI slots
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are expected to be defined in the devicetree node of the PCI bridge.
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config PCI_PWRCTRL_TC9563
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tristate "PCI Power Control driver for TC9563 PCIe switch"
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select PCI_PWRCTRL
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default m if ARCH_QCOM
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depends on I2C
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help
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Say Y here to enable the PCI Power Control driver of TC9563 PCIe
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switch.
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This driver enables power and configures the TC9563 PCIe switch
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through i2c. TC9563 is a PCIe switch which has one upstream and three
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downstream ports. To one of the downstream ports integrated ethernet
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MAC is connected as endpoint device. Other two downstream ports are
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supposed to connect to external device.
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# deprecated
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config HAVE_PWRCTL
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bool

‎drivers/pci/pwrctrl/Makefile‎

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obj-$(CONFIG_PCI_PWRCTRL_SLOT) += pci-pwrctrl-slot.o
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pci-pwrctrl-slot-y := slot.o
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obj-$(CONFIG_PCI_PWRCTRL_TC9563) += pci-pwrctrl-tc9563.o

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