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Merge branch 'pci/aer'
- Allow drivers to request a Bus Reset on Non-Fatal Errors (Lukas Wunner) - Send uevents for subordinate devices (not the bridge) on failure to recover from errors on the subordinate devices (Lukas Wunner) - Notify drivers by calling their err_handler.error_detected() callback on failure to recover (Lukas Wunner) - Update device error_state earlier after reset to align AER and EEH error recovery (Lukas Wunner) - Remove obsolete comments about .link_reset(), which was removed long ago (Lukas Wunner) - Emit a uevent for the beginning of error recovery if driver requests a reset (Niklas Schnelle) - Emit error recover uevents on s390 as is done by EEH and AER (Niklas Schnelle) - Include error_detected() result in AER uevent to align with corresponding uevents from EEH and s390 (Niklas Schnelle) - Decode new errors added in PCIe r6.0 (Lukas Wunner) - Print TLP Log for errors introduced since PCIe spec r1.1 (Lukas Wunner) - Check for allocation failure in pci_aer_init() (Vernon Yang) - Update error recovery documentation to match the current code and use consistent nomenclature (Lukas Wunner) - Avoid NULL pointer dereference in aer_ratelimit() when GHES error info points to a device with no AER Capability (Breno Leitao) * pci/aer: PCI/AER: Avoid NULL pointer dereference in aer_ratelimit() Documentation: PCI: Fix typos Documentation: PCI: Tidy error recovery doc's PCIe nomenclature Documentation: PCI: Amend error recovery doc with DPC/AER specifics Documentation: PCI: Sync error recovery doc with code Documentation: PCI: Sync AER doc with code PCI/AER: Fix NULL pointer access by aer_info PCI/AER: Print TLP Log for errors introduced since PCIe r1.1 PCI/AER: Support errors introduced by PCIe r6.0 powerpc/eeh: Use result of error_detected() in uevent s390/pci: Use pci_uevent_ers() in PCI recovery PCI/AER: Fix missing uevent on recovery when a reset is requested PCI/ERR: Remove remnants of .link_reset() callback PCI/ERR: Update device error_state already after reset PCI/ERR: Notify drivers on failure to recover PCI/ERR: Fix uevent on failure to recover PCI/AER: Allow drivers to opt in to Bus Reset on Non-Fatal Errors
2 parents 8f5ae30 + deb2f22 commit a0d0cad

16 files changed

Lines changed: 160 additions & 93 deletions

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Documentation/PCI/pci-error-recovery.rst

Lines changed: 34 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@ PCI Error Recovery
1313
Many PCI bus controllers are able to detect a variety of hardware
1414
PCI errors on the bus, such as parity errors on the data and address
1515
buses, as well as SERR and PERR errors. Some of the more advanced
16-
chipsets are able to deal with these errors; these include PCI-E chipsets,
16+
chipsets are able to deal with these errors; these include PCIe chipsets,
1717
and the PCI-host bridges found on IBM Power4, Power5 and Power6-based
1818
pSeries boxes. A typical action taken is to disconnect the affected device,
1919
halting all I/O to it. The goal of a disconnection is to avoid system
@@ -108,8 +108,8 @@ A driver does not have to implement all of these callbacks; however,
108108
if it implements any, it must implement error_detected(). If a callback
109109
is not implemented, the corresponding feature is considered unsupported.
110110
For example, if mmio_enabled() and resume() aren't there, then it
111-
is assumed that the driver is not doing any direct recovery and requires
112-
a slot reset. Typically a driver will want to know about
111+
is assumed that the driver does not need these callbacks
112+
for recovery. Typically a driver will want to know about
113113
a slot_reset().
114114

115115
The actual steps taken by a platform to recover from a PCI error
@@ -122,6 +122,10 @@ A PCI bus error is detected by the PCI hardware. On powerpc, the slot
122122
is isolated, in that all I/O is blocked: all reads return 0xffffffff,
123123
all writes are ignored.
124124

125+
Similarly, on platforms supporting Downstream Port Containment
126+
(PCIe r7.0 sec 6.2.11), the link to the sub-hierarchy with the
127+
faulting device is disabled. Any device in the sub-hierarchy
128+
becomes inaccessible.
125129

126130
STEP 1: Notification
127131
--------------------
@@ -141,6 +145,9 @@ shouldn't do any new IOs. Called in task context. This is sort of a
141145
All drivers participating in this system must implement this call.
142146
The driver must return one of the following result codes:
143147

148+
- PCI_ERS_RESULT_RECOVERED
149+
Driver returns this if it thinks the device is usable despite
150+
the error and does not need further intervention.
144151
- PCI_ERS_RESULT_CAN_RECOVER
145152
Driver returns this if it thinks it might be able to recover
146153
the HW by just banging IOs or if it wants to be given
@@ -199,7 +206,25 @@ reset or some such, but not restart operations. This callback is made if
199206
all drivers on a segment agree that they can try to recover and if no automatic
200207
link reset was performed by the HW. If the platform can't just re-enable IOs
201208
without a slot reset or a link reset, it will not call this callback, and
202-
instead will have gone directly to STEP 3 (Link Reset) or STEP 4 (Slot Reset)
209+
instead will have gone directly to STEP 3 (Link Reset) or STEP 4 (Slot Reset).
210+
211+
.. note::
212+
213+
On platforms supporting Advanced Error Reporting (PCIe r7.0 sec 6.2),
214+
the faulting device may already be accessible in STEP 1 (Notification).
215+
Drivers should nevertheless defer accesses to STEP 2 (MMIO Enabled)
216+
to be compatible with EEH on powerpc and with s390 (where devices are
217+
inaccessible until STEP 2).
218+
219+
On platforms supporting Downstream Port Containment, the link to the
220+
sub-hierarchy with the faulting device is re-enabled in STEP 3 (Link
221+
Reset). Hence devices in the sub-hierarchy are inaccessible until
222+
STEP 4 (Slot Reset).
223+
224+
For errors such as Surprise Down (PCIe r7.0 sec 6.2.7), the device
225+
may not even be accessible in STEP 4 (Slot Reset). Drivers can detect
226+
accessibility by checking whether reads from the device return all 1's
227+
(PCI_POSSIBLE_ERROR()).
203228

204229
.. note::
205230

@@ -234,14 +259,14 @@ The driver should return one of the following result codes:
234259

235260
The next step taken depends on the results returned by the drivers.
236261
If all drivers returned PCI_ERS_RESULT_RECOVERED, then the platform
237-
proceeds to either STEP3 (Link Reset) or to STEP 5 (Resume Operations).
262+
proceeds to either STEP 3 (Link Reset) or to STEP 5 (Resume Operations).
238263

239264
If any driver returned PCI_ERS_RESULT_NEED_RESET, then the platform
240265
proceeds to STEP 4 (Slot Reset)
241266

242267
STEP 3: Link Reset
243268
------------------
244-
The platform resets the link. This is a PCI-Express specific step
269+
The platform resets the link. This is a PCIe specific step
245270
and is done whenever a fatal error has been detected that can be
246271
"solved" by resetting the link.
247272

@@ -263,13 +288,13 @@ that is equivalent to what it would be after a fresh system
263288
power-on followed by power-on BIOS/system firmware initialization.
264289
Soft reset is also known as hot-reset.
265290

266-
Powerpc fundamental reset is supported by PCI Express cards only
291+
Powerpc fundamental reset is supported by PCIe cards only
267292
and results in device's state machines, hardware logic, port states and
268293
configuration registers to initialize to their default conditions.
269294

270295
For most PCI devices, a soft reset will be sufficient for recovery.
271296
Optional fundamental reset is provided to support a limited number
272-
of PCI Express devices for which a soft reset is not sufficient
297+
of PCIe devices for which a soft reset is not sufficient
273298
for recovery.
274299

275300
If the platform supports PCI hotplug, then the reset might be
@@ -313,7 +338,7 @@ Result codes:
313338
- PCI_ERS_RESULT_DISCONNECT
314339
Same as above.
315340

316-
Drivers for PCI Express cards that require a fundamental reset must
341+
Drivers for PCIe cards that require a fundamental reset must
317342
set the needs_freset bit in the pci_dev structure in their probe function.
318343
For example, the QLogic qla2xxx driver sets the needs_freset bit for certain
319344
PCI card types::

Documentation/PCI/pcieaer-howto.rst

Lines changed: 40 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -70,16 +70,16 @@ AER error output
7070
----------------
7171

7272
When a PCIe AER error is captured, an error message will be output to
73-
console. If it's a correctable error, it is output as an info message.
73+
console. If it's a correctable error, it is output as a warning message.
7474
Otherwise, it is printed as an error. So users could choose different
7575
log level to filter out correctable error messages.
7676

7777
Below shows an example::
7878

79-
0000:50:00.0: PCIe Bus Error: severity=Uncorrected (Fatal), type=Transaction Layer, id=0500(Requester ID)
79+
0000:50:00.0: PCIe Bus Error: severity=Uncorrectable (Fatal), type=Transaction Layer, (Requester ID)
8080
0000:50:00.0: device [8086:0329] error status/mask=00100000/00000000
81-
0000:50:00.0: [20] Unsupported Request (First)
82-
0000:50:00.0: TLP Header: 04000001 00200a03 05010000 00050100
81+
0000:50:00.0: [20] UnsupReq (First)
82+
0000:50:00.0: TLP Header: 0x04000001 0x00200a03 0x05010000 0x00050100
8383

8484
In the example, 'Requester ID' means the ID of the device that sent
8585
the error message to the Root Port. Please refer to PCIe specs for other
@@ -138,7 +138,7 @@ error message to the Root Port above it when it captures
138138
an error. The Root Port, upon receiving an error reporting message,
139139
internally processes and logs the error message in its AER
140140
Capability structure. Error information being logged includes storing
141-
the error reporting agent's requestor ID into the Error Source
141+
the error reporting agent's Requester ID into the Error Source
142142
Identification Registers and setting the error bits of the Root Error
143143
Status Register accordingly. If AER error reporting is enabled in the Root
144144
Error Command Register, the Root Port generates an interrupt when an
@@ -152,18 +152,6 @@ the device driver.
152152
Provide callbacks
153153
-----------------
154154

155-
callback reset_link to reset PCIe link
156-
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
157-
158-
This callback is used to reset the PCIe physical link when a
159-
fatal error happens. The Root Port AER service driver provides a
160-
default reset_link function, but different Upstream Ports might
161-
have different specifications to reset the PCIe link, so
162-
Upstream Port drivers may provide their own reset_link functions.
163-
164-
Section 3.2.2.2 provides more detailed info on when to call
165-
reset_link.
166-
167155
PCI error-recovery callbacks
168156
~~~~~~~~~~~~~~~~~~~~~~~~~~~~
169157

@@ -174,8 +162,8 @@ when performing error recovery actions.
174162
Data struct pci_driver has a pointer, err_handler, to point to
175163
pci_error_handlers who consists of a couple of callback function
176164
pointers. The AER driver follows the rules defined in
177-
pci-error-recovery.rst except PCIe-specific parts (e.g.
178-
reset_link). Please refer to pci-error-recovery.rst for detailed
165+
pci-error-recovery.rst except PCIe-specific parts (see
166+
below). Please refer to pci-error-recovery.rst for detailed
179167
definitions of the callbacks.
180168

181169
The sections below specify when to call the error callback functions.
@@ -189,10 +177,21 @@ software intervention or any loss of data. These errors do not
189177
require any recovery actions. The AER driver clears the device's
190178
correctable error status register accordingly and logs these errors.
191179

192-
Non-correctable (non-fatal and fatal) errors
193-
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
180+
Uncorrectable (non-fatal and fatal) errors
181+
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
194182

195-
If an error message indicates a non-fatal error, performing link reset
183+
The AER driver performs a Secondary Bus Reset to recover from
184+
uncorrectable errors. The reset is applied at the port above
185+
the originating device: If the originating device is an Endpoint,
186+
only the Endpoint is reset. If on the other hand the originating
187+
device has subordinate devices, those are all affected by the
188+
reset as well.
189+
190+
If the originating device is a Root Complex Integrated Endpoint,
191+
there's no port above where a Secondary Bus Reset could be applied.
192+
In this case, the AER driver instead applies a Function Level Reset.
193+
194+
If an error message indicates a non-fatal error, performing a reset
196195
at upstream is not required. The AER driver calls error_detected(dev,
197196
pci_channel_io_normal) to all drivers associated within a hierarchy in
198197
question. For example::
@@ -204,38 +203,34 @@ Downstream Port B and Endpoint.
204203

205204
A driver may return PCI_ERS_RESULT_CAN_RECOVER,
206205
PCI_ERS_RESULT_DISCONNECT, or PCI_ERS_RESULT_NEED_RESET, depending on
207-
whether it can recover or the AER driver calls mmio_enabled as next.
206+
whether it can recover without a reset, considers the device unrecoverable
207+
or needs a reset for recovery. If all affected drivers agree that they can
208+
recover without a reset, it is skipped. Should one driver request a reset,
209+
it overrides all other drivers.
208210

209211
If an error message indicates a fatal error, kernel will broadcast
210212
error_detected(dev, pci_channel_io_frozen) to all drivers within
211-
a hierarchy in question. Then, performing link reset at upstream is
212-
necessary. As different kinds of devices might use different approaches
213-
to reset link, AER port service driver is required to provide the
214-
function to reset link via callback parameter of pcie_do_recovery()
215-
function. If reset_link is not NULL, recovery function will use it
216-
to reset the link. If error_detected returns PCI_ERS_RESULT_CAN_RECOVER
217-
and reset_link returns PCI_ERS_RESULT_RECOVERED, the error handling goes
218-
to mmio_enabled.
219-
220-
Frequent Asked Questions
221-
------------------------
213+
a hierarchy in question. Then, performing a reset at upstream is
214+
necessary. If error_detected returns PCI_ERS_RESULT_CAN_RECOVER
215+
to indicate that recovery without a reset is possible, the error
216+
handling goes to mmio_enabled, but afterwards a reset is still
217+
performed.
222218

223-
Q:
224-
What happens if a PCIe device driver does not provide an
225-
error recovery handler (pci_driver->err_handler is equal to NULL)?
219+
In other words, for non-fatal errors, drivers may opt in to a reset.
220+
But for fatal errors, they cannot opt out of a reset, based on the
221+
assumption that the link is unreliable.
226222

227-
A:
228-
The devices attached with the driver won't be recovered. If the
229-
error is fatal, kernel will print out warning messages. Please refer
230-
to section 3 for more information.
223+
Frequently Asked Questions
224+
--------------------------
231225

232226
Q:
233-
What happens if an upstream port service driver does not provide
234-
callback reset_link?
227+
What happens if a PCIe device driver does not provide an
228+
error recovery handler (pci_driver->err_handler is equal to NULL)?
235229

236230
A:
237-
Fatal error recovery will fail if the errors are reported by the
238-
upstream ports who are attached by the service driver.
231+
The devices attached with the driver won't be recovered.
232+
The kernel will print out informational messages to identify
233+
unrecoverable devices.
239234

240235

241236
Software error injection

arch/powerpc/kernel/eeh_driver.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -334,7 +334,7 @@ static enum pci_ers_result eeh_report_error(struct eeh_dev *edev,
334334
rc = driver->err_handler->error_detected(pdev, pci_channel_io_frozen);
335335

336336
edev->in_error = true;
337-
pci_uevent_ers(pdev, PCI_ERS_RESULT_NONE);
337+
pci_uevent_ers(pdev, rc);
338338
return rc;
339339
}
340340

arch/s390/pci/pci_event.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -88,6 +88,7 @@ static pci_ers_result_t zpci_event_notify_error_detected(struct pci_dev *pdev,
8888
pci_ers_result_t ers_res = PCI_ERS_RESULT_DISCONNECT;
8989

9090
ers_res = driver->err_handler->error_detected(pdev, pdev->error_state);
91+
pci_uevent_ers(pdev, ers_res);
9192
if (ers_result_indicates_abort(ers_res))
9293
pr_info("%s: Automatic recovery failed after initial reporting\n", pci_name(pdev));
9394
else if (ers_res == PCI_ERS_RESULT_NEED_RESET)
@@ -244,6 +245,7 @@ static pci_ers_result_t zpci_event_attempt_error_recovery(struct pci_dev *pdev)
244245
ers_res = PCI_ERS_RESULT_RECOVERED;
245246

246247
if (ers_res != PCI_ERS_RESULT_RECOVERED) {
248+
pci_uevent_ers(pdev, PCI_ERS_RESULT_DISCONNECT);
247249
pr_err("%s: Automatic recovery failed; operator intervention is required\n",
248250
pci_name(pdev));
249251
status_str = "failed (driver can't recover)";
@@ -253,6 +255,7 @@ static pci_ers_result_t zpci_event_attempt_error_recovery(struct pci_dev *pdev)
253255
pr_info("%s: The device is ready to resume operations\n", pci_name(pdev));
254256
if (driver->err_handler->resume)
255257
driver->err_handler->resume(pdev);
258+
pci_uevent_ers(pdev, PCI_ERS_RESULT_RECOVERED);
256259
out_unlock:
257260
pci_dev_unlock(pdev);
258261
zpci_report_status(zdev, "recovery", status_str);

drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4215,7 +4215,6 @@ static pci_ers_result_t qlcnic_83xx_io_slot_reset(struct pci_dev *pdev)
42154215
struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
42164216
int err = 0;
42174217

4218-
pdev->error_state = pci_channel_io_normal;
42194218
err = pci_enable_device(pdev);
42204219
if (err)
42214220
goto disconnect;

drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3766,8 +3766,6 @@ static int qlcnic_attach_func(struct pci_dev *pdev)
37663766
struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
37673767
struct net_device *netdev = adapter->netdev;
37683768

3769-
pdev->error_state = pci_channel_io_normal;
3770-
37713769
err = pci_enable_device(pdev);
37723770
if (err)
37733771
return err;

drivers/net/ethernet/sfc/efx_common.c

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1258,9 +1258,6 @@ static void efx_io_resume(struct pci_dev *pdev)
12581258

12591259
/* For simplicity and reliability, we always require a slot reset and try to
12601260
* reset the hardware when a pci error affecting the device is detected.
1261-
* We leave both the link_reset and mmio_enabled callback unimplemented:
1262-
* with our request for slot reset the mmio_enabled callback will never be
1263-
* called, and the link_reset callback is not used by AER or EEH mechanisms.
12641261
*/
12651262
const struct pci_error_handlers efx_err_handlers = {
12661263
.error_detected = efx_io_error_detected,

drivers/net/ethernet/sfc/falcon/efx.c

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3128,9 +3128,6 @@ static void ef4_io_resume(struct pci_dev *pdev)
31283128

31293129
/* For simplicity and reliability, we always require a slot reset and try to
31303130
* reset the hardware when a pci error affecting the device is detected.
3131-
* We leave both the link_reset and mmio_enabled callback unimplemented:
3132-
* with our request for slot reset the mmio_enabled callback will never be
3133-
* called, and the link_reset callback is not used by AER or EEH mechanisms.
31343131
*/
31353132
static const struct pci_error_handlers ef4_err_handlers = {
31363133
.error_detected = ef4_io_error_detected,

drivers/net/ethernet/sfc/siena/efx_common.c

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1285,9 +1285,6 @@ static void efx_io_resume(struct pci_dev *pdev)
12851285

12861286
/* For simplicity and reliability, we always require a slot reset and try to
12871287
* reset the hardware when a pci error affecting the device is detected.
1288-
* We leave both the link_reset and mmio_enabled callback unimplemented:
1289-
* with our request for slot reset the mmio_enabled callback will never be
1290-
* called, and the link_reset callback is not used by AER or EEH mechanisms.
12911288
*/
12921289
const struct pci_error_handlers efx_siena_err_handlers = {
12931290
.error_detected = efx_io_error_detected,

drivers/pci/pci-driver.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1582,7 +1582,7 @@ static int pci_uevent(const struct device *dev, struct kobj_uevent_env *env)
15821582
return 0;
15831583
}
15841584

1585-
#if defined(CONFIG_PCIEAER) || defined(CONFIG_EEH)
1585+
#if defined(CONFIG_PCIEAER) || defined(CONFIG_EEH) || defined(CONFIG_S390)
15861586
/**
15871587
* pci_uevent_ers - emit a uevent during recovery path of PCI device
15881588
* @pdev: PCI device undergoing error recovery
@@ -1596,6 +1596,7 @@ void pci_uevent_ers(struct pci_dev *pdev, enum pci_ers_result err_type)
15961596
switch (err_type) {
15971597
case PCI_ERS_RESULT_NONE:
15981598
case PCI_ERS_RESULT_CAN_RECOVER:
1599+
case PCI_ERS_RESULT_NEED_RESET:
15991600
envp[idx++] = "ERROR_EVENT=BEGIN_RECOVERY";
16001601
envp[idx++] = "DEVICE_ONLINE=0";
16011602
break;

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