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arm64: dts: amlogic: gx: switch to the new PWM controller binding
Use the new PWM controller binding which now relies on passing all clock inputs available on the SoC (instead of passing the "wanted" clock input for a given board). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20241227212514.1376682-4-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
1 parent 2014c95 commit a526eee

18 files changed

Lines changed: 54 additions & 40 deletions

‎arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -345,24 +345,18 @@
345345
&pwm_AO_ab {
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pinctrl-0 = <&pwm_ao_a_3_pins>;
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pinctrl-names = "default";
348-
clocks = <&clkc CLKID_FCLK_DIV4>;
349-
clock-names = "clkin0";
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status = "okay";
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};
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353351
&pwm_ab {
354352
pinctrl-0 = <&pwm_b_pins>;
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pinctrl-names = "default";
356-
clocks = <&clkc CLKID_FCLK_DIV4>;
357-
clock-names = "clkin0";
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status = "okay";
359355
};
360356

361357
&pwm_ef {
362358
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
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pinctrl-names = "default";
364-
clocks = <&clkc CLKID_FCLK_DIV4>;
365-
clock-names = "clkin0";
366360
status = "okay";
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};
368362

‎arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi‎

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@@ -240,8 +240,6 @@
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status = "okay";
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pinctrl-0 = <&pwm_e_pins>;
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pinctrl-names = "default";
243-
clocks = <&clkc CLKID_FCLK_DIV4>;
244-
clock-names = "clkin0";
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};
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&saradc {

‎arch/arm64/boot/dts/amlogic/meson-gx.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -329,14 +329,14 @@
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};
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pwm_ab: pwm@8550 {
332-
compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
332+
compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x08550 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_cd: pwm@8650 {
339-
compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
339+
compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x08650 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
@@ -351,7 +351,7 @@
351351
};
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pwm_ef: pwm@86c0 {
354-
compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x086c0 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
@@ -498,7 +498,7 @@
498498
};
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500500
pwm_AO_ab: pwm@550 {
501-
compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
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compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x00550 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";

‎arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts‎

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@@ -298,8 +298,6 @@
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status = "okay";
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pinctrl-0 = <&pwm_e_pins>;
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pinctrl-names = "default";
301-
clocks = <&clkc CLKID_FCLK_DIV4>;
302-
clock-names = "clkin0";
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};
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305303
&saradc {

‎arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts‎

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@@ -241,8 +241,6 @@
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status = "okay";
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pinctrl-0 = <&pwm_e_pins>;
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pinctrl-names = "default";
244-
clocks = <&clkc CLKID_FCLK_DIV4>;
245-
clock-names = "clkin0";
246244
};
247245

248246
/* Wireless SDIO Module */

‎arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi‎

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@@ -150,8 +150,6 @@
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status = "okay";
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pinctrl-0 = <&pwm_e_pins>;
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pinctrl-names = "default";
153-
clocks = <&clkc CLKID_FCLK_DIV4>;
154-
clock-names = "clkin0";
155153
};
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157155
/* Wireless SDIO Module */

‎arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi‎

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@@ -222,8 +222,6 @@
222222
status = "okay";
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pinctrl-0 = <&pwm_e_pins>;
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pinctrl-names = "default";
225-
clocks = <&clkc CLKID_FCLK_DIV4>;
226-
clock-names = "clkin0";
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};
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&saradc {

‎arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi‎

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@@ -185,8 +185,6 @@
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status = "okay";
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pinctrl-0 = <&pwm_e_pins>;
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pinctrl-names = "default";
188-
clocks = <&clkc CLKID_FCLK_DIV4>;
189-
clock-names = "clkin0";
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};
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192190
&saradc {

‎arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -739,6 +739,31 @@
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};
740740
};
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742+
&pwm_ab {
743+
clocks = <&xtal>,
744+
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
745+
<&clkc CLKID_FCLK_DIV4>,
746+
<&clkc CLKID_FCLK_DIV3>;
747+
};
748+
749+
&pwm_AO_ab {
750+
clocks = <&xtal>, <&clkc CLKID_CLK81>;
751+
};
752+
753+
&pwm_cd {
754+
clocks = <&xtal>,
755+
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
756+
<&clkc CLKID_FCLK_DIV4>,
757+
<&clkc CLKID_FCLK_DIV3>;
758+
};
759+
760+
&pwm_ef {
761+
clocks = <&xtal>,
762+
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
763+
<&clkc CLKID_FCLK_DIV4>,
764+
<&clkc CLKID_FCLK_DIV3>;
765+
};
766+
742767
&pwrc {
743768
resets = <&reset RESET_VIU>,
744769
<&reset RESET_VENC>,

‎arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts‎

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@@ -280,8 +280,6 @@
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status = "okay";
281281
pinctrl-0 = <&pwm_e_pins>;
282282
pinctrl-names = "default";
283-
clocks = <&clkc CLKID_FCLK_DIV4>;
284-
clock-names = "clkin0";
285283
};
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287285
/* This is connected to the Bluetooth module: */

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