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LoongArch: Adjust misc routines for 32BIT/64BIT
Adjust misc routines for both 32BIT and 64BIT, including: bitops, bswap, checksum, string, jump label, unaligned access emulator, suspend/wakeup routines, etc. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
1 parent 48c7294 commit b15dfda

10 files changed

Lines changed: 151 additions & 82 deletions

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‎arch/loongarch/include/asm/bitops.h‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,11 +13,22 @@
1313

1414
#include <asm/barrier.h>
1515

16+
#ifdef CONFIG_32BIT_REDUCED
17+
18+
#include <asm-generic/bitops/ffs.h>
19+
#include <asm-generic/bitops/fls.h>
20+
#include <asm-generic/bitops/__ffs.h>
21+
#include <asm-generic/bitops/__fls.h>
22+
23+
#else /* CONFIG_32BIT_STANDARD || CONFIG_64BIT */
24+
1625
#include <asm-generic/bitops/builtin-ffs.h>
1726
#include <asm-generic/bitops/builtin-fls.h>
1827
#include <asm-generic/bitops/builtin-__ffs.h>
1928
#include <asm-generic/bitops/builtin-__fls.h>
2029

30+
#endif
31+
2132
#include <asm-generic/bitops/ffz.h>
2233
#include <asm-generic/bitops/fls64.h>
2334

‎arch/loongarch/include/asm/checksum.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,8 @@
99
#include <linux/bitops.h>
1010
#include <linux/in6.h>
1111

12+
#ifdef CONFIG_64BIT
13+
1214
#define _HAVE_ARCH_IPV6_CSUM
1315
__sum16 csum_ipv6_magic(const struct in6_addr *saddr,
1416
const struct in6_addr *daddr,
@@ -61,6 +63,8 @@ static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
6163
extern unsigned int do_csum(const unsigned char *buff, int len);
6264
#define do_csum do_csum
6365

66+
#endif
67+
6468
#include <asm-generic/checksum.h>
6569

6670
#endif /* __ASM_CHECKSUM_H */

‎arch/loongarch/include/asm/jump_label.h‎

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,15 +10,23 @@
1010
#ifndef __ASSEMBLER__
1111

1212
#include <linux/types.h>
13+
#include <linux/stringify.h>
14+
#include <asm/asm.h>
1315

1416
#define JUMP_LABEL_NOP_SIZE 4
1517

18+
#ifdef CONFIG_32BIT
19+
#define JUMP_LABEL_TYPE ".long "
20+
#else
21+
#define JUMP_LABEL_TYPE ".quad "
22+
#endif
23+
1624
/* This macro is also expanded on the Rust side. */
1725
#define JUMP_TABLE_ENTRY(key, label) \
1826
".pushsection __jump_table, \"aw\" \n\t" \
19-
".align 3 \n\t" \
27+
".align " __stringify(PTRLOG) " \n\t" \
2028
".long 1b - ., " label " - . \n\t" \
21-
".quad " key " - . \n\t" \
29+
JUMP_LABEL_TYPE key " - . \n\t" \
2230
".popsection \n\t"
2331

2432
#define ARCH_STATIC_BRANCH_ASM(key, label) \

‎arch/loongarch/include/asm/string.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55
#ifndef _ASM_STRING_H
66
#define _ASM_STRING_H
77

8+
#ifdef CONFIG_64BIT
89
#define __HAVE_ARCH_MEMSET
910
extern void *memset(void *__s, int __c, size_t __count);
1011
extern void *__memset(void *__s, int __c, size_t __count);
@@ -16,6 +17,7 @@ extern void *__memcpy(void *__to, __const__ void *__from, size_t __n);
1617
#define __HAVE_ARCH_MEMMOVE
1718
extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
1819
extern void *__memmove(void *__dest, __const__ void *__src, size_t __n);
20+
#endif
1921

2022
#if defined(CONFIG_KASAN) && !defined(__SANITIZE_ADDRESS__)
2123

‎arch/loongarch/kernel/unaligned.c‎

Lines changed: 24 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -27,12 +27,21 @@ static u32 unaligned_instructions_user;
2727
static u32 unaligned_instructions_kernel;
2828
#endif
2929

30-
static inline unsigned long read_fpr(unsigned int idx)
30+
static inline u64 read_fpr(unsigned int idx)
3131
{
32+
#ifdef CONFIG_64BIT
3233
#define READ_FPR(idx, __value) \
3334
__asm__ __volatile__("movfr2gr.d %0, $f"#idx"\n\t" : "=r"(__value));
34-
35-
unsigned long __value;
35+
#else
36+
#define READ_FPR(idx, __value) \
37+
{ \
38+
u32 __value_lo, __value_hi; \
39+
__asm__ __volatile__("movfr2gr.s %0, $f"#idx"\n\t" : "=r"(__value_lo)); \
40+
__asm__ __volatile__("movfrh2gr.s %0, $f"#idx"\n\t" : "=r"(__value_hi)); \
41+
__value = (__value_lo | ((u64)__value_hi << 32)); \
42+
}
43+
#endif
44+
u64 __value;
3645

3746
switch (idx) {
3847
case 0:
@@ -138,11 +147,20 @@ static inline unsigned long read_fpr(unsigned int idx)
138147
return __value;
139148
}
140149

141-
static inline void write_fpr(unsigned int idx, unsigned long value)
150+
static inline void write_fpr(unsigned int idx, u64 value)
142151
{
152+
#ifdef CONFIG_64BIT
143153
#define WRITE_FPR(idx, value) \
144154
__asm__ __volatile__("movgr2fr.d $f"#idx", %0\n\t" :: "r"(value));
145-
155+
#else
156+
#define WRITE_FPR(idx, value) \
157+
{ \
158+
u32 value_lo = value; \
159+
u32 value_hi = value >> 32; \
160+
__asm__ __volatile__("movgr2fr.w $f"#idx", %0\n\t" :: "r"(value_lo)); \
161+
__asm__ __volatile__("movgr2frh.w $f"#idx", %0\n\t" :: "r"(value_hi)); \
162+
}
163+
#endif
146164
switch (idx) {
147165
case 0:
148166
WRITE_FPR(0, value);
@@ -252,7 +270,7 @@ void emulate_load_store_insn(struct pt_regs *regs, void __user *addr, unsigned i
252270
bool sign, write;
253271
bool user = user_mode(regs);
254272
unsigned int res, size = 0;
255-
unsigned long value = 0;
273+
u64 value = 0;
256274
union loongarch_instruction insn;
257275

258276
perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);

‎arch/loongarch/lib/bswapdi.c‎

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
// SPDX-License-Identifier: GPL-2.0
2+
#include <linux/export.h>
3+
#include <linux/compiler.h>
4+
#include <uapi/linux/swab.h>
5+
6+
/* To silence -Wmissing-prototypes. */
7+
unsigned long long __bswapdi2(unsigned long long u);
8+
9+
unsigned long long notrace __bswapdi2(unsigned long long u)
10+
{
11+
return ___constant_swab64(u);
12+
}
13+
EXPORT_SYMBOL(__bswapdi2);

‎arch/loongarch/lib/bswapsi.c‎

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
// SPDX-License-Identifier: GPL-2.0
2+
#include <linux/export.h>
3+
#include <linux/compiler.h>
4+
#include <uapi/linux/swab.h>
5+
6+
/* To silence -Wmissing-prototypes. */
7+
unsigned int __bswapsi2(unsigned int u);
8+
9+
unsigned int notrace __bswapsi2(unsigned int u)
10+
{
11+
return ___constant_swab32(u);
12+
}
13+
EXPORT_SYMBOL(__bswapsi2);

‎arch/loongarch/lib/unaligned.S‎

Lines changed: 36 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -24,35 +24,35 @@
2424
* a3: sign
2525
*/
2626
SYM_FUNC_START(unaligned_read)
27-
beqz a2, 5f
27+
beqz a2, 5f
2828

29-
li.w t2, 0
30-
addi.d t0, a2, -1
31-
slli.d t1, t0, 3
32-
add.d a0, a0, t0
29+
li.w t2, 0
30+
LONG_ADDI t0, a2, -1
31+
PTR_SLLI t1, t0, LONGLOG
32+
PTR_ADD a0, a0, t0
3333

34-
beqz a3, 2f
35-
1: ld.b t3, a0, 0
36-
b 3f
34+
beqz a3, 2f
35+
1: ld.b t3, a0, 0
36+
b 3f
3737

38-
2: ld.bu t3, a0, 0
39-
3: sll.d t3, t3, t1
40-
or t2, t2, t3
41-
addi.d t1, t1, -8
42-
addi.d a0, a0, -1
43-
addi.d a2, a2, -1
44-
bgtz a2, 2b
45-
4: st.d t2, a1, 0
38+
2: ld.bu t3, a0, 0
39+
3: LONG_SLLV t3, t3, t1
40+
or t2, t2, t3
41+
LONG_ADDI t1, t1, -8
42+
PTR_ADDI a0, a0, -1
43+
PTR_ADDI a2, a2, -1
44+
bgtz a2, 2b
45+
4: LONG_S t2, a1, 0
4646

47-
move a0, a2
48-
jr ra
47+
move a0, a2
48+
jr ra
4949

50-
5: li.w a0, -EFAULT
51-
jr ra
50+
5: li.w a0, -EFAULT
51+
jr ra
5252

53-
_asm_extable 1b, .L_fixup_handle_unaligned
54-
_asm_extable 2b, .L_fixup_handle_unaligned
55-
_asm_extable 4b, .L_fixup_handle_unaligned
53+
_asm_extable 1b, .L_fixup_handle_unaligned
54+
_asm_extable 2b, .L_fixup_handle_unaligned
55+
_asm_extable 4b, .L_fixup_handle_unaligned
5656
SYM_FUNC_END(unaligned_read)
5757

5858
/*
@@ -63,21 +63,21 @@ SYM_FUNC_END(unaligned_read)
6363
* a2: n
6464
*/
6565
SYM_FUNC_START(unaligned_write)
66-
beqz a2, 3f
66+
beqz a2, 3f
6767

68-
li.w t0, 0
69-
1: srl.d t1, a1, t0
70-
2: st.b t1, a0, 0
71-
addi.d t0, t0, 8
72-
addi.d a2, a2, -1
73-
addi.d a0, a0, 1
74-
bgtz a2, 1b
68+
li.w t0, 0
69+
1: LONG_SRLV t1, a1, t0
70+
2: st.b t1, a0, 0
71+
LONG_ADDI t0, t0, 8
72+
PTR_ADDI a2, a2, -1
73+
PTR_ADDI a0, a0, 1
74+
bgtz a2, 1b
7575

76-
move a0, a2
77-
jr ra
76+
move a0, a2
77+
jr ra
7878

79-
3: li.w a0, -EFAULT
80-
jr ra
79+
3: li.w a0, -EFAULT
80+
jr ra
8181

82-
_asm_extable 2b, .L_fixup_handle_unaligned
82+
_asm_extable 2b, .L_fixup_handle_unaligned
8383
SYM_FUNC_END(unaligned_write)

‎arch/loongarch/power/platform.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -72,10 +72,10 @@ static int __init loongson3_acpi_suspend_init(void)
7272
status = acpi_evaluate_integer(NULL, "\\SADR", NULL, &suspend_addr);
7373
if (ACPI_FAILURE(status) || !suspend_addr) {
7474
pr_info("ACPI S3 supported with hardware register default\n");
75-
loongson_sysconf.suspend_addr = (u64)default_suspend_addr;
75+
loongson_sysconf.suspend_addr = (unsigned long)default_suspend_addr;
7676
} else {
7777
pr_info("ACPI S3 supported with Loongson ACPI SADR extension\n");
78-
loongson_sysconf.suspend_addr = (u64)phys_to_virt(PHYSADDR(suspend_addr));
78+
loongson_sysconf.suspend_addr = (unsigned long)phys_to_virt(PHYSADDR(suspend_addr));
7979
}
8080
#endif
8181
return 0;

‎arch/loongarch/power/suspend_asm.S‎

Lines changed: 36 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -14,41 +14,41 @@
1414

1515
/* preparatory stuff */
1616
.macro SETUP_SLEEP
17-
addi.d sp, sp, -PT_SIZE
18-
st.d $r1, sp, PT_R1
19-
st.d $r2, sp, PT_R2
20-
st.d $r3, sp, PT_R3
21-
st.d $r4, sp, PT_R4
22-
st.d $r21, sp, PT_R21
23-
st.d $r22, sp, PT_R22
24-
st.d $r23, sp, PT_R23
25-
st.d $r24, sp, PT_R24
26-
st.d $r25, sp, PT_R25
27-
st.d $r26, sp, PT_R26
28-
st.d $r27, sp, PT_R27
29-
st.d $r28, sp, PT_R28
30-
st.d $r29, sp, PT_R29
31-
st.d $r30, sp, PT_R30
32-
st.d $r31, sp, PT_R31
17+
PTR_ADDI sp, sp, -PT_SIZE
18+
REG_S $r1, sp, PT_R1
19+
REG_S $r2, sp, PT_R2
20+
REG_S $r3, sp, PT_R3
21+
REG_S $r4, sp, PT_R4
22+
REG_S $r21, sp, PT_R21
23+
REG_S $r22, sp, PT_R22
24+
REG_S $r23, sp, PT_R23
25+
REG_S $r24, sp, PT_R24
26+
REG_S $r25, sp, PT_R25
27+
REG_S $r26, sp, PT_R26
28+
REG_S $r27, sp, PT_R27
29+
REG_S $r28, sp, PT_R28
30+
REG_S $r29, sp, PT_R29
31+
REG_S $r30, sp, PT_R30
32+
REG_S $r31, sp, PT_R31
3333
.endm
3434

3535
.macro SETUP_WAKEUP
36-
ld.d $r1, sp, PT_R1
37-
ld.d $r2, sp, PT_R2
38-
ld.d $r3, sp, PT_R3
39-
ld.d $r4, sp, PT_R4
40-
ld.d $r21, sp, PT_R21
41-
ld.d $r22, sp, PT_R22
42-
ld.d $r23, sp, PT_R23
43-
ld.d $r24, sp, PT_R24
44-
ld.d $r25, sp, PT_R25
45-
ld.d $r26, sp, PT_R26
46-
ld.d $r27, sp, PT_R27
47-
ld.d $r28, sp, PT_R28
48-
ld.d $r29, sp, PT_R29
49-
ld.d $r30, sp, PT_R30
50-
ld.d $r31, sp, PT_R31
51-
addi.d sp, sp, PT_SIZE
36+
REG_L $r1, sp, PT_R1
37+
REG_L $r2, sp, PT_R2
38+
REG_L $r3, sp, PT_R3
39+
REG_L $r4, sp, PT_R4
40+
REG_L $r21, sp, PT_R21
41+
REG_L $r22, sp, PT_R22
42+
REG_L $r23, sp, PT_R23
43+
REG_L $r24, sp, PT_R24
44+
REG_L $r25, sp, PT_R25
45+
REG_L $r26, sp, PT_R26
46+
REG_L $r27, sp, PT_R27
47+
REG_L $r28, sp, PT_R28
48+
REG_L $r29, sp, PT_R29
49+
REG_L $r30, sp, PT_R30
50+
REG_L $r31, sp, PT_R31
51+
PTR_ADDI sp, sp, PT_SIZE
5252
.endm
5353

5454
.text
@@ -59,15 +59,15 @@ SYM_FUNC_START(loongarch_suspend_enter)
5959
SETUP_SLEEP
6060

6161
la.pcrel t0, acpi_saved_sp
62-
st.d sp, t0, 0
62+
REG_S sp, t0, 0
6363

6464
bl __flush_cache_all
6565

6666
/* Pass RA and SP to BIOS */
67-
addi.d a1, sp, 0
67+
PTR_ADDI a1, sp, 0
6868
la.pcrel a0, loongarch_wakeup_start
6969
la.pcrel t0, loongarch_suspend_addr
70-
ld.d t0, t0, 0
70+
REG_L t0, t0, 0
7171
jirl ra, t0, 0 /* Call BIOS's STR sleep routine */
7272

7373
/*
@@ -83,7 +83,7 @@ SYM_INNER_LABEL(loongarch_wakeup_start, SYM_L_GLOBAL)
8383
csrwr t0, LOONGARCH_CSR_CRMD
8484

8585
la.pcrel t0, acpi_saved_sp
86-
ld.d sp, t0, 0
86+
REG_L sp, t0, 0
8787

8888
SETUP_WAKEUP
8989
jr ra

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