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net: phy: dp83822: Fix reset pin definitions
commit de96f6a upstream. This change fixes a rare issue where the PHY fails to detect a link due to incorrect reset behavior. The SW_RESET definition was incorrectly assigned to bit 14, which is the Digital Restart bit according to the datasheet. This commit corrects SW_RESET to bit 15 and assigns DIG_RESTART to bit 14 as per the datasheet specifications. The SW_RESET define is only used in the phy_reset function, which fully re-initializes the PHY after the reset is performed. The change in the bit definitions should not have any negative impact on the functionality of the PHY. v2: - added Fixes tag - improved commit message Cc: stable@vger.kernel.org Fixes: 5dc39fd ("net: phy: DP83822: Add ability to advertise Fiber connection") Signed-off-by: Alex Michel <alex.michel@wiedemann-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Message-ID: <AS1P250MB0608A798661549BF83C4B43EA9462@AS1P250MB0608.EURP250.PROD.OUTLOOK.COM> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Lines changed: 2 additions & 2 deletions

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drivers/net/phy/dp83822.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -45,8 +45,8 @@
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/* Control Register 2 bits */
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#define DP83822_FX_ENABLE BIT(14)
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48-
#define DP83822_HW_RESET BIT(15)
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#define DP83822_SW_RESET BIT(14)
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#define DP83822_SW_RESET BIT(15)
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#define DP83822_DIG_RESTART BIT(14)
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/* PHY STS bits */
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#define DP83822_PHYSTS_DUPLEX BIT(2)

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