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28 | 28 | /* Register Map */ |
29 | 29 | #define REG_CON 0x00 /* control register */ |
30 | 30 | #define REG_CLKDIV 0x04 /* clock divisor register */ |
31 | | -#define REG_MRXADDR 0x08 /* slave address for REGISTER_TX */ |
32 | | -#define REG_MRXRADDR 0x0c /* slave register address for REGISTER_TX */ |
| 31 | +#define REG_MRXADDR 0x08 /* target address for REGISTER_TX */ |
| 32 | +#define REG_MRXRADDR 0x0c /* target register address for REGISTER_TX */ |
33 | 33 | #define REG_MTXCNT 0x10 /* number of bytes to be transmitted */ |
34 | 34 | #define REG_MRXCNT 0x14 /* number of bytes to be received */ |
35 | 35 | #define REG_IEN 0x18 /* interrupt enable */ |
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68 | 68 | /* REG_IEN/REG_IPD bits */ |
69 | 69 | #define REG_INT_BTF BIT(0) /* a byte was transmitted */ |
70 | 70 | #define REG_INT_BRF BIT(1) /* a byte was received */ |
71 | | -#define REG_INT_MBTF BIT(2) /* master data transmit finished */ |
72 | | -#define REG_INT_MBRF BIT(3) /* master data receive finished */ |
| 71 | +#define REG_INT_MBTF BIT(2) /* controller data transmit finished */ |
| 72 | +#define REG_INT_MBRF BIT(3) /* controller data receive finished */ |
73 | 73 | #define REG_INT_START BIT(4) /* START condition generated */ |
74 | 74 | #define REG_INT_STOP BIT(5) /* STOP condition generated */ |
75 | 75 | #define REG_INT_NAKRCV BIT(6) /* NACK received */ |
@@ -184,7 +184,7 @@ struct rk3x_i2c_soc_data { |
184 | 184 | * @wait: the waitqueue to wait for i2c transfer |
185 | 185 | * @busy: the condition for the event to wait for |
186 | 186 | * @msg: current i2c message |
187 | | - * @addr: addr of i2c slave device |
| 187 | + * @addr: addr of i2c target device |
188 | 188 | * @mode: mode of i2c transfer |
189 | 189 | * @is_last_msg: flag determines whether it is the last msg in this transfer |
190 | 190 | * @state: state of i2c transfer |
@@ -979,7 +979,7 @@ static int rk3x_i2c_setup(struct rk3x_i2c *i2c, struct i2c_msg *msgs, int num) |
979 | 979 | /* |
980 | 980 | * The I2C adapter can issue a small (len < 4) write packet before |
981 | 981 | * reading. This speeds up SMBus-style register reads. |
982 | | - * The MRXADDR/MRXRADDR hold the slave address and the slave register |
| 982 | + * The MRXADDR/MRXRADDR hold the target address and the target register |
983 | 983 | * address in this case. |
984 | 984 | */ |
985 | 985 |
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@@ -1016,7 +1016,7 @@ static int rk3x_i2c_setup(struct rk3x_i2c *i2c, struct i2c_msg *msgs, int num) |
1016 | 1016 | addr |= 1; /* set read bit */ |
1017 | 1017 |
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1018 | 1018 | /* |
1019 | | - * We have to transmit the slave addr first. Use |
| 1019 | + * We have to transmit the target addr first. Use |
1020 | 1020 | * MOD_REGISTER_TX for that purpose. |
1021 | 1021 | */ |
1022 | 1022 | i2c->mode = REG_CON_MOD_REGISTER_TX; |
@@ -1160,9 +1160,9 @@ static u32 rk3x_i2c_func(struct i2c_adapter *adap) |
1160 | 1160 | } |
1161 | 1161 |
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1162 | 1162 | static const struct i2c_algorithm rk3x_i2c_algorithm = { |
1163 | | - .master_xfer = rk3x_i2c_xfer, |
1164 | | - .master_xfer_atomic = rk3x_i2c_xfer_polling, |
1165 | | - .functionality = rk3x_i2c_func, |
| 1163 | + .xfer = rk3x_i2c_xfer, |
| 1164 | + .xfer_atomic = rk3x_i2c_xfer_polling, |
| 1165 | + .functionality = rk3x_i2c_func, |
1166 | 1166 | }; |
1167 | 1167 |
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1168 | 1168 | static const struct rk3x_i2c_soc_data rv1108_soc_data = { |
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