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lin755willdeacon
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iommu/arm-smmu-v3: disable stall for quiet_cd
In the stall model, invalid transactions were expected to be stalled and aborted by the IOPF handler. However, when killing a test case with a huge amount of data, the accelerator streamline can not stop until all data is consumed even if the page fault handler reports errors. As a result, the kill may take a long time, about 10 seconds with numerous iopf interrupts. So disable stall for quiet_cd in the non-force stall model, since force stall model (STALL_MODEL==0b10) requires CD.S must be 1. Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com> Suggested-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Link: https://lore.kernel.org/r/20231206005727.46150-1-zhangfei.gao@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
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drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

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Original file line numberDiff line numberDiff line change
@@ -1063,6 +1063,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
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bool cd_live;
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__le64 *cdptr;
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struct arm_smmu_ctx_desc_cfg *cd_table = &master->cd_table;
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struct arm_smmu_device *smmu = master->smmu;
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if (WARN_ON(ssid >= (1 << cd_table->s1cdmax)))
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return -E2BIG;
@@ -1077,6 +1078,8 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
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if (!cd) { /* (5) */
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val = 0;
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} else if (cd == &quiet_cd) { /* (4) */
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if (!(smmu->features & ARM_SMMU_FEAT_STALL_FORCE))
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val &= ~(CTXDESC_CD_0_S | CTXDESC_CD_0_R);
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val |= CTXDESC_CD_0_TCR_EPD0;
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} else if (cd_live) { /* (3) */
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val &= ~CTXDESC_CD_0_ASID;

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