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prabhakarladgeertu
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pinctrl: renesas: rzg2l: Add support to configure slew-rate
Add support to configure slew-rate property of the pin. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240530173857.164073-11-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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drivers/pinctrl/renesas/pinctrl-rzg2l.c

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -127,6 +127,7 @@
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#define PFC(off) (0x0400 + (off) * 4)
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#define PIN(off) (0x0800 + (off))
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#define IOLH(off) (0x1000 + (off) * 8)
130+
#define SR(off) (0x1400 + (off) * 8)
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#define IEN(off) (0x1800 + (off) * 8)
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#define ISEL(off) (0x2C00 + (off) * 8)
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#define SD_CH(off, ch) ((off) + (ch) * 4)
@@ -145,6 +146,7 @@
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#define PFC_MASK 0x07
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#define IEN_MASK 0x01
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#define IOLH_MASK 0x03
149+
#define SR_MASK 0x01
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#define PM_INPUT 0x1
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#define PM_OUTPUT 0x2
@@ -1049,6 +1051,13 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
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arg = ret;
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break;
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case PIN_CONFIG_SLEW_RATE:
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if (!(cfg & PIN_CFG_SR))
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return -EINVAL;
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arg = rzg2l_read_pin_config(pctrl, SR(off), bit, SR_MASK);
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break;
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case PIN_CONFIG_DRIVE_STRENGTH: {
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unsigned int index;
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@@ -1155,6 +1164,15 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
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settings.power_source = pinconf_to_config_argument(_configs[i]);
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break;
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1167+
case PIN_CONFIG_SLEW_RATE:
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arg = pinconf_to_config_argument(_configs[i]);
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if (!(cfg & PIN_CFG_SR) || arg > 1)
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return -EINVAL;
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1173+
rzg2l_rmw_pin_config(pctrl, SR(off), bit, SR_MASK, arg);
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break;
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case PIN_CONFIG_DRIVE_STRENGTH:
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arg = pinconf_to_config_argument(_configs[i]);
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