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fixup! drm: apple: set timestamps for 120hz
Signed-off-by: Janne Grunau <j@jannau.net>
1 parent ca49a73 commit bd6a8f6

4 files changed

Lines changed: 19 additions & 8 deletions

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drivers/gpu/drm/apple/dcp-internal.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -184,7 +184,7 @@ struct apple_dcp {
184184
/* Current display mode */
185185
bool during_modeset;
186186
bool valid_mode;
187-
s64 precise_sync_rate;
187+
bool use_timestamps;
188188
struct dcp_set_digital_out_mode_req mode;
189189

190190
/* completion for active turning true */

drivers/gpu/drm/apple/iomfb_template.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1210,17 +1210,17 @@ int DCP_FW_NAME(iomfb_modeset)(struct apple_dcp *dcp,
12101210
if (cmode)
12111211
dev_info(dcp->dev,
12121212
"set_digital_out_mode() color mode depth:%hhu format:%u "
1213-
"colorimetry:%u eotf:%u range:%u\n", cmode->depth,
1213+
"colorimetry:%u eotf:%u range:%u vrr:%u\n", cmode->depth,
12141214
cmode->format, cmode->colorimetry, cmode->eotf,
1215-
cmode->range);
1215+
cmode->range, mode->vrr);
12161216

12171217
dcp->mode = (struct dcp_set_digital_out_mode_req){
12181218
.color_mode_id = mode->color_mode_id,
12191219
.timing_mode_id = mode->timing_mode_id
12201220
};
12211221

1222-
/* keep around to fake timestamps in dcp_swap_submit */
1223-
dcp->precise_sync_rate = mode->precise_sync_rate;
1222+
/* Keep track of suspected vrr modes */
1223+
dcp->use_timestamps = mode->vrr;
12241224

12251225
cookie = kzalloc(sizeof(*cookie), GFP_KERNEL);
12261226
if (!cookie) {
@@ -1411,7 +1411,7 @@ void DCP_FW_NAME(iomfb_flush)(struct apple_dcp *dcp, struct drm_crtc *crtc, stru
14111411
req->clear = 1;
14121412
}
14131413

1414-
if (has_surface && dcp->main_display && (dcp->precise_sync_rate >> 16) == 120) {
1414+
if (has_surface && dcp->use_timestamps) {
14151415
/*
14161416
* Fake timstamps to get 120hz refresh rate. It looks
14171417
* like the actual value does not matter, as long as it is non zero.

drivers/gpu/drm/apple/parser.c

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -499,6 +499,18 @@ static int parse_mode(struct dcp_parse_ctx *handle,
499499
if (is_virtual)
500500
return -EINVAL;
501501

502+
/*
503+
* HACK:
504+
* Mark the 120 Hz mode on j314/j316 (identified by resolution) as vrr.
505+
* We still do not know how to drive VRR but at least seetinng timestamps
506+
* in the the swap_surface message to non-zero values drives the display
507+
* at 120 fps.
508+
*/
509+
if (vert.precise_sync_rate >> 16 == 120 &&
510+
((horiz.active == 3024 && vert.active == 1964) ||
511+
(horiz.active == 3456 && vert.active == 2234)))
512+
out->vrr = true;
513+
502514
vert.active -= notch_height;
503515
vert.sync_width += notch_height;
504516

@@ -526,7 +538,6 @@ static int parse_mode(struct dcp_parse_ctx *handle,
526538

527539
out->timing_mode_id = id;
528540
out->color_mode_id = best_color_mode;
529-
out->precise_sync_rate = vert.precise_sync_rate;
530541

531542
trace_iomfb_timing_mode(handle->dcp, id, *score, horiz.active,
532543
vert.active, vert.precise_sync_rate,

drivers/gpu/drm/apple/parser.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -87,11 +87,11 @@ struct dcp_display_mode {
8787
struct drm_display_mode mode;
8888
u32 color_mode_id;
8989
u32 timing_mode_id;
90-
s64 precise_sync_rate;
9190
struct dcp_color_mode sdr_rgb;
9291
struct dcp_color_mode sdr_444;
9392
struct dcp_color_mode sdr;
9493
struct dcp_color_mode best;
94+
bool vrr;
9595
};
9696

9797
struct dimension {

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