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MAINTAINERS: Add entry for Andes SoC
Add entry for Andes SoC maintainer and related files Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Link: https://lore.kernel.org/r/20250711133025.2192404-10-ben717@andestech.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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MAINTAINERS

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@@ -21285,6 +21285,15 @@ F: drivers/irqchip/irq-riscv-intc.c
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F: include/linux/irqchip/riscv-aplic.h
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F: include/linux/irqchip/riscv-imsic.h
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RISC-V ANDES SoC Support
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M: Ben Zong-You Xie <ben717@andestech.com>
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S: Maintained
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T: git: https://github.com/ben717-linux/linux
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F: Documentation/devicetree/bindings/interrupt-controller/andestech,plicsw.yaml
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F: Documentation/devicetree/bindings/riscv/andes.yaml
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F: Documentation/devicetree/bindings/timer/andestech,plmt0.yaml
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F: arch/riscv/boot/dts/andes/
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RISC-V ARCHITECTURE
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M: Paul Walmsley <paul.walmsley@sifive.com>
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M: Palmer Dabbelt <palmer@dabbelt.com>

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