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kaleshap86
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RDMA/bnxt_re: Query firmware defaults of CC params during probe
Added function to query firmware default values of CC parameters during driver init. These values will be stored in driver local structure and used in subsequent patch. Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com> Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> Link: https://patch.msgid.link/20250107024553.2926983-4-kalesh-anakkur.purayil@broadcom.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
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4 files changed

Lines changed: 121 additions & 0 deletions

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‎drivers/infiniband/hw/bnxt_re/bnxt_re.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -230,6 +230,7 @@ struct bnxt_re_dev {
230230
struct dentry *dbg_root;
231231
struct dentry *qp_debugfs;
232232
unsigned long event_bitmap;
233+
struct bnxt_qplib_cc_param cc_param;
233234
};
234235

235236
#define to_bnxt_re_dev(ptr, member) \

‎drivers/infiniband/hw/bnxt_re/main.c‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2096,6 +2096,11 @@ static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 op_type)
20962096
set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags);
20972097

20982098
if (!rdev->is_virtfn) {
2099+
/* Query f/w defaults of CC params */
2100+
rc = bnxt_qplib_query_cc_param(&rdev->qplib_res, &rdev->cc_param);
2101+
if (rc)
2102+
ibdev_warn(&rdev->ibdev, "Failed to query CC defaults\n");
2103+
20992104
rc = bnxt_re_setup_qos(rdev);
21002105
if (rc)
21012106
ibdev_info(&rdev->ibdev,

‎drivers/infiniband/hw/bnxt_re/qplib_sp.c‎

Lines changed: 113 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1016,3 +1016,116 @@ int bnxt_qplib_read_context(struct bnxt_qplib_rcfw *rcfw, u8 res_type,
10161016
dma_free_coherent(&rcfw->pdev->dev, sbuf.size, sbuf.sb, sbuf.dma_addr);
10171017
return rc;
10181018
}
1019+
1020+
static void bnxt_qplib_read_cc_gen1(struct bnxt_qplib_cc_param_ext *cc_ext,
1021+
struct creq_query_roce_cc_gen1_resp_sb_tlv *sb)
1022+
{
1023+
cc_ext->inact_th_hi = le16_to_cpu(sb->inactivity_th_hi);
1024+
cc_ext->min_delta_cnp = le16_to_cpu(sb->min_time_between_cnps);
1025+
cc_ext->init_cp = le16_to_cpu(sb->init_cp);
1026+
cc_ext->tr_update_mode = sb->tr_update_mode;
1027+
cc_ext->tr_update_cyls = sb->tr_update_cycles;
1028+
cc_ext->fr_rtt = sb->fr_num_rtts;
1029+
cc_ext->ai_rate_incr = sb->ai_rate_increase;
1030+
cc_ext->rr_rtt_th = le16_to_cpu(sb->reduction_relax_rtts_th);
1031+
cc_ext->ar_cr_th = le16_to_cpu(sb->additional_relax_cr_th);
1032+
cc_ext->cr_min_th = le16_to_cpu(sb->cr_min_th);
1033+
cc_ext->bw_avg_weight = sb->bw_avg_weight;
1034+
cc_ext->cr_factor = sb->actual_cr_factor;
1035+
cc_ext->cr_th_max_cp = le16_to_cpu(sb->max_cp_cr_th);
1036+
cc_ext->cp_bias_en = sb->cp_bias_en;
1037+
cc_ext->cp_bias = sb->cp_bias;
1038+
cc_ext->cnp_ecn = sb->cnp_ecn;
1039+
cc_ext->rtt_jitter_en = sb->rtt_jitter_en;
1040+
cc_ext->bytes_per_usec = le16_to_cpu(sb->link_bytes_per_usec);
1041+
cc_ext->cc_cr_reset_th = le16_to_cpu(sb->reset_cc_cr_th);
1042+
cc_ext->cr_width = sb->cr_width;
1043+
cc_ext->min_quota = sb->quota_period_min;
1044+
cc_ext->max_quota = sb->quota_period_max;
1045+
cc_ext->abs_max_quota = sb->quota_period_abs_max;
1046+
cc_ext->tr_lb = le16_to_cpu(sb->tr_lower_bound);
1047+
cc_ext->cr_prob_fac = sb->cr_prob_factor;
1048+
cc_ext->tr_prob_fac = sb->tr_prob_factor;
1049+
cc_ext->fair_cr_th = le16_to_cpu(sb->fairness_cr_th);
1050+
cc_ext->red_div = sb->red_div;
1051+
cc_ext->cnp_ratio_th = sb->cnp_ratio_th;
1052+
cc_ext->ai_ext_rtt = le16_to_cpu(sb->exp_ai_rtts);
1053+
cc_ext->exp_crcp_ratio = sb->exp_ai_cr_cp_ratio;
1054+
cc_ext->low_rate_en = sb->use_rate_table;
1055+
cc_ext->cpcr_update_th = le16_to_cpu(sb->cp_exp_update_th);
1056+
cc_ext->ai_rtt_th1 = le16_to_cpu(sb->high_exp_ai_rtts_th1);
1057+
cc_ext->ai_rtt_th2 = le16_to_cpu(sb->high_exp_ai_rtts_th2);
1058+
cc_ext->cf_rtt_th = le16_to_cpu(sb->actual_cr_cong_free_rtts_th);
1059+
cc_ext->sc_cr_th1 = le16_to_cpu(sb->severe_cong_cr_th1);
1060+
cc_ext->sc_cr_th2 = le16_to_cpu(sb->severe_cong_cr_th2);
1061+
cc_ext->l64B_per_rtt = le32_to_cpu(sb->link64B_per_rtt);
1062+
cc_ext->cc_ack_bytes = sb->cc_ack_bytes;
1063+
cc_ext->reduce_cf_rtt_th = le16_to_cpu(sb->reduce_init_cong_free_rtts_th);
1064+
}
1065+
1066+
int bnxt_qplib_query_cc_param(struct bnxt_qplib_res *res,
1067+
struct bnxt_qplib_cc_param *cc_param)
1068+
{
1069+
struct bnxt_qplib_tlv_query_rcc_sb *ext_sb;
1070+
struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1071+
struct creq_query_roce_cc_resp resp = {};
1072+
struct creq_query_roce_cc_resp_sb *sb;
1073+
struct bnxt_qplib_cmdqmsg msg = {};
1074+
struct cmdq_query_roce_cc req = {};
1075+
struct bnxt_qplib_rcfw_sbuf sbuf;
1076+
size_t resp_size;
1077+
int rc;
1078+
1079+
/* Query the parameters from chip */
1080+
bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, CMDQ_BASE_OPCODE_QUERY_ROCE_CC,
1081+
sizeof(req));
1082+
if (bnxt_qplib_is_chip_gen_p5_p7(res->cctx))
1083+
resp_size = sizeof(*ext_sb);
1084+
else
1085+
resp_size = sizeof(*sb);
1086+
1087+
sbuf.size = ALIGN(resp_size, BNXT_QPLIB_CMDQE_UNITS);
1088+
sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size,
1089+
&sbuf.dma_addr, GFP_KERNEL);
1090+
if (!sbuf.sb)
1091+
return -ENOMEM;
1092+
1093+
req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS;
1094+
bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req),
1095+
sizeof(resp), 0);
1096+
rc = bnxt_qplib_rcfw_send_message(res->rcfw, &msg);
1097+
if (rc)
1098+
goto out;
1099+
1100+
ext_sb = sbuf.sb;
1101+
sb = bnxt_qplib_is_chip_gen_p5_p7(res->cctx) ? &ext_sb->base_sb :
1102+
(struct creq_query_roce_cc_resp_sb *)ext_sb;
1103+
1104+
cc_param->enable = sb->enable_cc & CREQ_QUERY_ROCE_CC_RESP_SB_ENABLE_CC;
1105+
cc_param->tos_ecn = (sb->tos_dscp_tos_ecn &
1106+
CREQ_QUERY_ROCE_CC_RESP_SB_TOS_ECN_MASK) >>
1107+
CREQ_QUERY_ROCE_CC_RESP_SB_TOS_ECN_SFT;
1108+
cc_param->tos_dscp = (sb->tos_dscp_tos_ecn &
1109+
CREQ_QUERY_ROCE_CC_RESP_SB_TOS_DSCP_MASK) >>
1110+
CREQ_QUERY_ROCE_CC_RESP_SB_TOS_DSCP_SFT;
1111+
cc_param->alt_tos_dscp = sb->alt_tos_dscp;
1112+
cc_param->alt_vlan_pcp = sb->alt_vlan_pcp;
1113+
1114+
cc_param->g = sb->g;
1115+
cc_param->nph_per_state = sb->num_phases_per_state;
1116+
cc_param->init_cr = le16_to_cpu(sb->init_cr);
1117+
cc_param->init_tr = le16_to_cpu(sb->init_tr);
1118+
cc_param->cc_mode = sb->cc_mode;
1119+
cc_param->inact_th = le16_to_cpu(sb->inactivity_th);
1120+
cc_param->rtt = le16_to_cpu(sb->rtt);
1121+
cc_param->tcp_cp = le16_to_cpu(sb->tcp_cp);
1122+
cc_param->time_pph = sb->time_per_phase;
1123+
cc_param->pkts_pph = sb->pkts_per_phase;
1124+
if (bnxt_qplib_is_chip_gen_p5_p7(res->cctx)) {
1125+
bnxt_qplib_read_cc_gen1(&cc_param->cc_ext, &ext_sb->gen1_sb);
1126+
cc_param->inact_th |= (cc_param->cc_ext.inact_th_hi & 0x3F) << 16;
1127+
}
1128+
out:
1129+
dma_free_coherent(&rcfw->pdev->dev, sbuf.size, sbuf.sb, sbuf.dma_addr);
1130+
return rc;
1131+
}

‎drivers/infiniband/hw/bnxt_re/qplib_sp.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -355,6 +355,8 @@ int bnxt_qplib_modify_cc(struct bnxt_qplib_res *res,
355355
struct bnxt_qplib_cc_param *cc_param);
356356
int bnxt_qplib_read_context(struct bnxt_qplib_rcfw *rcfw, u8 type, u32 xid,
357357
u32 resp_size, void *resp_va);
358+
int bnxt_qplib_query_cc_param(struct bnxt_qplib_res *res,
359+
struct bnxt_qplib_cc_param *cc_param);
358360

359361
#define BNXT_VAR_MAX_WQE 4352
360362
#define BNXT_VAR_MAX_SLOT_ALIGN 256

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