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21 | 21 | SNDRV_PCM_FMTBIT_S20_3LE | \ |
22 | 22 | SNDRV_PCM_FMTBIT_S24_LE) |
23 | 23 |
|
| 24 | +#define LOONGSON_I2S_TX_ENABLE (I2S_CTRL_TX_EN | I2S_CTRL_TX_DMA_EN) |
| 25 | +#define LOONGSON_I2S_RX_ENABLE (I2S_CTRL_RX_EN | I2S_CTRL_RX_DMA_EN) |
| 26 | + |
24 | 27 | static int loongson_i2s_trigger(struct snd_pcm_substream *substream, int cmd, |
25 | 28 | struct snd_soc_dai *dai) |
26 | 29 | { |
27 | 30 | struct loongson_i2s *i2s = snd_soc_dai_get_drvdata(dai); |
| 31 | + unsigned int mask; |
28 | 32 | int ret = 0; |
29 | 33 |
|
30 | 34 | switch (cmd) { |
31 | 35 | case SNDRV_PCM_TRIGGER_START: |
32 | 36 | case SNDRV_PCM_TRIGGER_RESUME: |
33 | 37 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
34 | | - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
35 | | - regmap_update_bits(i2s->regmap, LS_I2S_CTRL, |
36 | | - I2S_CTRL_TX_EN | I2S_CTRL_TX_DMA_EN, |
37 | | - I2S_CTRL_TX_EN | I2S_CTRL_TX_DMA_EN); |
38 | | - else |
39 | | - regmap_update_bits(i2s->regmap, LS_I2S_CTRL, |
40 | | - I2S_CTRL_RX_EN | I2S_CTRL_RX_DMA_EN, |
41 | | - I2S_CTRL_RX_EN | I2S_CTRL_RX_DMA_EN); |
| 38 | + mask = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? |
| 39 | + LOONGSON_I2S_TX_ENABLE : LOONGSON_I2S_RX_ENABLE; |
| 40 | + regmap_update_bits(i2s->regmap, LS_I2S_CTRL, mask, mask); |
42 | 41 | break; |
43 | 42 | case SNDRV_PCM_TRIGGER_STOP: |
44 | 43 | case SNDRV_PCM_TRIGGER_SUSPEND: |
45 | 44 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
46 | | - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
47 | | - regmap_update_bits(i2s->regmap, LS_I2S_CTRL, |
48 | | - I2S_CTRL_TX_EN | I2S_CTRL_TX_DMA_EN, 0); |
49 | | - else |
50 | | - regmap_update_bits(i2s->regmap, LS_I2S_CTRL, |
51 | | - I2S_CTRL_RX_EN | I2S_CTRL_RX_DMA_EN, 0); |
| 45 | + mask = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? |
| 46 | + LOONGSON_I2S_TX_ENABLE : LOONGSON_I2S_RX_ENABLE; |
| 47 | + regmap_update_bits(i2s->regmap, LS_I2S_CTRL, mask, 0); |
52 | 48 | break; |
53 | 49 | default: |
54 | 50 | ret = -EINVAL; |
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