Skip to content

Commit d626d24

Browse files
Andre-ARMLinus Walleij
authored andcommitted
dt-bindings: pinctrl: add compatible for Allwinner A523/T527
The A523 contains a pin controller similar to previous SoCs, although using 10 GPIO banks (PortB-PortK), all of them being IRQ capable. With this SoC we introduce a new style of binding, where the pinmux values for each pin group are stored in the new "allwinner,pinmux" property in the DT node, instead of requiring every driver to store a mapping between the function names and the required pinmux. Add a new binding file, since all the different variants of the old binding are making the file a bit unwieldy to handle already, and the new property would make the situation worse. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250306235827.4895-7-andre.przywara@arm.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
1 parent f5e2cd3 commit d626d24

1 file changed

Lines changed: 175 additions & 0 deletions

File tree

Lines changed: 175 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,175 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/pinctrl/allwinner,sun55i-a523-pinctrl.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Allwinner A523 Pin Controller
8+
9+
maintainers:
10+
- Andre Przywara <andre.przywara@arm.com>
11+
12+
properties:
13+
"#gpio-cells":
14+
const: 3
15+
description:
16+
GPIO consumers must use three arguments, first the number of the
17+
bank, then the pin number inside that bank, and finally the GPIO
18+
flags.
19+
20+
"#interrupt-cells":
21+
const: 3
22+
description:
23+
Interrupts consumers must use three arguments, first the number
24+
of the bank, then the pin number inside that bank, and finally
25+
the interrupts flags.
26+
27+
compatible:
28+
enum:
29+
- allwinner,sun55i-a523-pinctrl
30+
- allwinner,sun55i-a523-r-pinctrl
31+
32+
reg:
33+
maxItems: 1
34+
35+
interrupts:
36+
minItems: 2
37+
maxItems: 10
38+
description:
39+
One interrupt per external interrupt bank supported on the
40+
controller, sorted by bank number ascending order.
41+
42+
clocks:
43+
items:
44+
- description: Bus Clock
45+
- description: High Frequency Oscillator
46+
- description: Low Frequency Oscillator
47+
48+
clock-names:
49+
items:
50+
- const: apb
51+
- const: hosc
52+
- const: losc
53+
54+
gpio-controller: true
55+
interrupt-controller: true
56+
gpio-line-names: true
57+
58+
input-debounce:
59+
description:
60+
Debouncing periods in microseconds, one period per interrupt
61+
bank found in the controller
62+
$ref: /schemas/types.yaml#/definitions/uint32-array
63+
minItems: 2
64+
maxItems: 10
65+
66+
patternProperties:
67+
# It's pretty scary, but the basic idea is that:
68+
# - One node name can start with either s- or r- for PRCM nodes,
69+
# - Then, the name itself can be any repetition of <string>- (to
70+
# accommodate with nodes like uart4-rts-cts-pins), where each
71+
# string can be either starting with 'p' but in a string longer
72+
# than 3, or something that doesn't start with 'p',
73+
# - Then, the bank name is optional and will be between pa and pm.
74+
# Some pins groups that have several options will have the pin
75+
# numbers then,
76+
# - Finally, the name will end with either -pin or pins.
77+
78+
"^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-m][0-9]*?-)??pins?$":
79+
type: object
80+
81+
properties:
82+
pins: true
83+
function: true
84+
bias-disable: true
85+
bias-pull-up: true
86+
bias-pull-down: true
87+
88+
drive-strength:
89+
$ref: /schemas/types.yaml#/definitions/uint32
90+
enum: [10, 20, 30, 40]
91+
92+
allwinner,pinmux:
93+
$ref: /schemas/types.yaml#/definitions/uint32-array
94+
description:
95+
Pinmux selector value, for each pin. Almost every time this value
96+
is the same for all pins, so any array shorter than the number of
97+
pins will repeat the last value, to allow just specifying a single
98+
cell, for all cells.
99+
100+
required:
101+
- pins
102+
- allwinner,pinmux
103+
- function
104+
105+
additionalProperties: false
106+
107+
"^vcc-p[a-m]-supply$":
108+
description:
109+
Power supplies for pin banks.
110+
111+
required:
112+
- "#gpio-cells"
113+
- compatible
114+
- reg
115+
- clocks
116+
- clock-names
117+
- gpio-controller
118+
- "#interrupt-cells"
119+
- interrupts
120+
- interrupt-controller
121+
122+
allOf:
123+
- $ref: pinctrl.yaml#
124+
- if:
125+
properties:
126+
compatible:
127+
enum:
128+
- allwinner,sun55i-a523-pinctrl
129+
130+
then:
131+
properties:
132+
interrupts:
133+
minItems: 10
134+
maxItems: 10
135+
136+
- if:
137+
properties:
138+
compatible:
139+
enum:
140+
- allwinner,sun55i-a523-r-pinctrl
141+
142+
then:
143+
properties:
144+
interrupts:
145+
minItems: 2
146+
maxItems: 2
147+
148+
additionalProperties: false
149+
150+
examples:
151+
- |
152+
r_pio: pinctrl@7022000 {
153+
compatible = "allwinner,sun55i-a523-r-pinctrl";
154+
reg = <0x7022000 0x800>;
155+
interrupts = <0 159 4>, <0 161 4>;
156+
clocks = <&r_ccu 1>, <&osc24M>, <&osc32k>;
157+
clock-names = "apb", "hosc", "losc";
158+
gpio-controller;
159+
#gpio-cells = <3>;
160+
interrupt-controller;
161+
#interrupt-cells = <3>;
162+
163+
r_i2c_pins: r-i2c-pins {
164+
pins = "PL0", "PL1";
165+
allwinner,pinmux = <2>;
166+
function = "r_i2c0";
167+
bias-pull-up;
168+
};
169+
170+
r_spi_pins: r-spi-pins {
171+
pins = "PL11" ,"PL12", "PL13";
172+
allwinner,pinmux = <6>;
173+
function = "r_spi";
174+
};
175+
};

0 commit comments

Comments
 (0)