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arm64: dts: ti: Add basic support for phyBOARD-Lyra-AM62Ax
The phyCORE-AM62Ax [1] is a SoM (System on Module) featuring TI's AM62Ax SoC. It can be used in combination with different carrier boards. This module can come with different sizes and models for DDR, eMMC, SPI NOR Flash and various SoCs from the AM62Ax family. A development Kit, called phyBOARD-Lyra [2] is used as a carrier board reference design with a mapper board being used to allow the phyCORE-AM62Ax to fit the phyBOARD-Lyra. Supported features: * Debug UART * SPI NOR Flash * eMMC * 2x Ethernet * Micro SD card * I2C EEPROM * I2C RTC * GPIO Expander * LEDs * USB * HDMI * USB-C * Audio For more details, see: [1] Product page SoM: https://www.phytec.com/product/phycore-am62a [2] Product page CB: https://www.phytec.com/product/phyboard-am62a Signed-off-by: Garrett Giordano <ggiordano@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240626155244.3311436-4-ggiordano@phytec.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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‎arch/arm64/boot/dts/ti/Makefile‎

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@@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk-nand.dtbo
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# Boards with AM62Ax SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62a7-phyboard-lyra-rdk.dtb
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# Boards with AM62Px SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb
@@ -224,6 +225,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
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# Enable support for device-tree overlays
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DTC_FLAGS_k3-am625-beagleplay += -@
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DTC_FLAGS_k3-am625-phyboard-lyra-rdk += -@
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DTC_FLAGS_k3-am62a7-phyboard-lyra-rdk += -@
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DTC_FLAGS_k3-am625-sk += -@
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DTC_FLAGS_k3-am62-lp-sk += -@
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DTC_FLAGS_k3-am62a7-sk += -@

‎arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi‎

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// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/*
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* Copyright (C) 2023 - 2024 PHYTEC America LLC
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* Author: Garrett Giordano <ggiordano@phytec.com>
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*
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* Product homepage:
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* https://www.phytec.com/product/phycore-am62a
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/net/ti-dp83867.h>
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/ {
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model = "PHYTEC phyCORE-AM62Ax";
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compatible = "phytec,am62a-phycore-som", "ti,am62a7";
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aliases {
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ethernet0 = &cpsw_port1;
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gpio0 = &main_gpio0;
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gpio1 = &main_gpio1;
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i2c0 = &main_i2c0;
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mmc0 = &sdhci0;
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rtc0 = &i2c_som_rtc;
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spi0 = &ospi0;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&leds_pins_default>;
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led-0 {
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&main_gpio0 13 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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function = LED_FUNCTION_HEARTBEAT;
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};
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};
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memory@80000000 {
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device_type = "memory";
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/* 2G RAM */
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reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* global cma region */
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0x00 0x24000000>;
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alloc-ranges = <0x00 0xc0000000 0x00 0x24000000>;
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linux,cma-default;
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};
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secure_tfa_ddr: tfa@9e780000 {
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reg = <0x00 0x9e780000 0x00 0x80000>;
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alignment = <0x1000>;
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no-map;
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};
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secure_ddr: optee@9e800000 {
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reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
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alignment = <0x1000>;
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no-map;
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};
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wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x9c900000 0x00 0x01e00000>;
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no-map;
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};
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};
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vcc_5v0_som: regulator-vcc-5v0-som {
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compatible = "regulator-fixed";
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regulator-name = "VCC_5V0_SOM";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&main_pmx0 {
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leds_pins_default: leds-default-pins {
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pinctrl-single,pins = <
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AM62AX_IOPAD(0x034, PIN_OUTPUT, 7) /* (K20) OSPI0_CSN2.GPIO0_13 */
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>;
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};
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main_i2c0_pins_default: main-i2c0-default-pins {
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pinctrl-single,pins = <
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AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (D17) I2C0_SCL */
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AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (E16) I2C0_SDA */
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>;
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};
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main_mdio1_pins_default: main-mdio1-default-pins {
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pinctrl-single,pins = <
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AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */
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AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */
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>;
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};
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main_mmc0_pins_default: main-mmc0-default-pins {
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pinctrl-single,pins = <
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AM62AX_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (Y6) MMC0_CMD */
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AM62AX_IOPAD(0x218, PIN_INPUT_PULLDOWN, 0) /* (AB7) MMC0_CLK */
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AM62AX_IOPAD(0x214, PIN_INPUT_PULLUP, 0) /* (AA6) MMC0_DAT0 */
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AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AB6) MMC0_DAT1 */
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AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (Y7) MMC0_DAT2 */
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AM62AX_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (AA7) MMC0_DAT3 */
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AM62AX_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (Y8) MMC0_DAT4 */
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AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (W7) MMC0_DAT5 */
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AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (W9) MMC0_DAT6 */
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AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AB8) MMC0_DAT7 */
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>;
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};
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main_rgmii1_pins_default: main-rgmii1-default-pins {
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pinctrl-single,pins = <
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AM62AX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */
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AM62AX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */
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AM62AX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */
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AM62AX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */
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AM62AX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */
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AM62AX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */
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AM62AX_IOPAD(0x134, PIN_OUTPUT, 0) /* (Y17) RGMII1_TD0 */
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AM62AX_IOPAD(0x138, PIN_OUTPUT, 0) /* (V16) RGMII1_TD1 */
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AM62AX_IOPAD(0x13c, PIN_OUTPUT, 0) /* (Y16) RGMII1_TD2 */
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AM62AX_IOPAD(0x140, PIN_OUTPUT, 0) /* (AA17) RGMII1_TD3 */
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AM62AX_IOPAD(0x130, PIN_OUTPUT, 0) /* (AB17) RGMII1_TXC */
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AM62AX_IOPAD(0x12c, PIN_OUTPUT, 0) /* (W16) RGMII1_TX_CTL */
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>;
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};
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ospi0_pins_default: ospi0-default-pins {
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pinctrl-single,pins = <
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AM62AX_IOPAD(0x000, PIN_OUTPUT, 0) /* (L22) OSPI0_CLK */
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AM62AX_IOPAD(0x02c, PIN_OUTPUT, 0) /* (H21) OSPI0_CSn0 */
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AM62AX_IOPAD(0x038, PIN_OUTPUT, 0) /* (G20) OSPI0_CSn3 */
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AM62AX_IOPAD(0x00c, PIN_INPUT, 0) /* (J21) OSPI0_D0 */
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AM62AX_IOPAD(0x010, PIN_INPUT, 0) /* (J18) OSPI0_D1 */
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AM62AX_IOPAD(0x014, PIN_INPUT, 0) /* (J19) OSPI0_D2 */
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AM62AX_IOPAD(0x018, PIN_INPUT, 0) /* (H18) OSPI0_D3 */
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AM62AX_IOPAD(0x01c, PIN_INPUT, 0) /* (K21) OSPI0_D4 */
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AM62AX_IOPAD(0x020, PIN_INPUT, 0) /* (H19) OSPI0_D5 */
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AM62AX_IOPAD(0x024, PIN_INPUT, 0) /* (J20) OSPI0_D6 */
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AM62AX_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
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AM62AX_IOPAD(0x008, PIN_INPUT, 0) /* (L21) OSPI0_DQS */
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>;
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};
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pmic_irq_pins_default: pmic-irq-default-pins {
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pinctrl-single,pins = <
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AM62AX_IOPAD(0x1f4, PIN_INPUT, 0) /* (D16) EXTINTn */
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>;
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};
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};
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&cpsw3g {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_rgmii1_pins_default>;
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};
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&cpsw_port1 {
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phy-mode = "rgmii-rxid";
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phy-handle = <&cpsw3g_phy1>;
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};
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&cpsw3g_mdio {
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pinctrl-names = "default";
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pinctrl-0 = <&main_mdio1_pins_default>;
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cpsw3g_phy1: ethernet-phy@1 {
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compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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};
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};
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&fss {
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status = "okay";
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};
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&main_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c0_pins_default>;
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clock-frequency = <400000>;
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status = "okay";
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pmic@30 {
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compatible = "ti,tps65219";
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reg = <0x30>;
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buck1-supply = <&vcc_5v0_som>;
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buck2-supply = <&vcc_5v0_som>;
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buck3-supply = <&vcc_5v0_som>;
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ldo1-supply = <&vdd_3v3>;
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ldo2-supply = <&vdd_1v8>;
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ldo3-supply = <&vcc_5v0_som>;
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ldo4-supply = <&vcc_5v0_som>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_irq_pins_default>;
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interrupt-parent = <&gic500>;
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interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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ti,power-button;
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system-power-controller;
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regulators {
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vdd_3v3: buck1 {
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regulator-name = "VDD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdd_1v8: buck2 {
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regulator-name = "VDD_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdd_lpddr4: buck3 {
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regulator-name = "VDD_LPDDR4";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vddshv5_sdio: ldo1 {
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regulator-name = "VDDSHV5_SDIO";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-allow-bypass;
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regulator-boot-on;
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regulator-always-on;
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};
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vddr_core: ldo2 {
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regulator-name = "VDDR_CORE";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdda_1v8: ldo3 {
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regulator-name = "VDDA_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdd_2v5: ldo4 {
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regulator-name = "VDD_2V5";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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eeprom@50 {
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compatible = "atmel,24c32";
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pagesize = <32>;
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reg = <0x50>;
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};
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i2c_som_rtc: rtc@52 {
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compatible = "microcrystal,rv3028";
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reg = <0x52>;
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};
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};
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&main_gpio0 {
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status = "okay";
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};
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&main_gpio1 {
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status = "okay";
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};
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&main_gpio_intr {
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status = "okay";
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};
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&ospi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&ospi0_pins_default>;
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status = "okay";
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serial_flash: flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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spi-tx-bus-width = <8>;
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spi-rx-bus-width = <8>;
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spi-max-frequency = <25000000>;
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cdns,tshsl-ns = <60>;
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cdns,tsd2d-ns = <60>;
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cdns,tchsh-ns = <60>;
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cdns,tslch-ns = <60>;
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cdns,read-delay = <0>;
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};
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};
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&sdhci0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_mmc0_pins_default>;
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disable-wp;
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non-removable;
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status = "okay";
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};

‎arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts‎

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// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/*
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* Copyright (C) 2023 - 2024 PHYTEC America LLC
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* Author: Garrett Giordano <ggiordano@phytec.com>
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*
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* Product homepage:
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* https://www.phytec.com/product/phyboard-am62a
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*/
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#include "k3-am62a7.dtsi"
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#include "k3-am62a-phycore-som.dtsi"
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#include "k3-am62x-phyboard-lyra.dtsi"
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/ {
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compatible = "phytec,am62a7-phyboard-lyra-rdk",
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"phytec,am62a-phycore-som", "ti,am62a7";
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model = "PHYTEC phyBOARD-Lyra AM62A7";
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};

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