@@ -48,9 +48,70 @@ static const struct irdma_irq_ops ig3rdma_irq_ops = {
4848 .irdma_en_irq = ig3rdma_ena_irq ,
4949};
5050
51+ static const struct irdma_hw_stat_map ig3rdma_hw_stat_map [] = {
52+ [IRDMA_HW_STAT_INDEX_RXVLANERR ] = { 0 , 0 , 0 },
53+ [IRDMA_HW_STAT_INDEX_IP4RXOCTS ] = { 8 , 0 , 0 },
54+ [IRDMA_HW_STAT_INDEX_IP4RXPKTS ] = { 16 , 0 , 0 },
55+ [IRDMA_HW_STAT_INDEX_IP4RXDISCARD ] = { 24 , 0 , 0 },
56+ [IRDMA_HW_STAT_INDEX_IP4RXTRUNC ] = { 32 , 0 , 0 },
57+ [IRDMA_HW_STAT_INDEX_IP4RXFRAGS ] = { 40 , 0 , 0 },
58+ [IRDMA_HW_STAT_INDEX_IP4RXMCOCTS ] = { 48 , 0 , 0 },
59+ [IRDMA_HW_STAT_INDEX_IP4RXMCPKTS ] = { 56 , 0 , 0 },
60+ [IRDMA_HW_STAT_INDEX_IP6RXOCTS ] = { 64 , 0 , 0 },
61+ [IRDMA_HW_STAT_INDEX_IP6RXPKTS ] = { 72 , 0 , 0 },
62+ [IRDMA_HW_STAT_INDEX_IP6RXDISCARD ] = { 80 , 0 , 0 },
63+ [IRDMA_HW_STAT_INDEX_IP6RXTRUNC ] = { 88 , 0 , 0 },
64+ [IRDMA_HW_STAT_INDEX_IP6RXFRAGS ] = { 96 , 0 , 0 },
65+ [IRDMA_HW_STAT_INDEX_IP6RXMCOCTS ] = { 104 , 0 , 0 },
66+ [IRDMA_HW_STAT_INDEX_IP6RXMCPKTS ] = { 112 , 0 , 0 },
67+ [IRDMA_HW_STAT_INDEX_IP4TXOCTS ] = { 120 , 0 , 0 },
68+ [IRDMA_HW_STAT_INDEX_IP4TXPKTS ] = { 128 , 0 , 0 },
69+ [IRDMA_HW_STAT_INDEX_IP4TXFRAGS ] = { 136 , 0 , 0 },
70+ [IRDMA_HW_STAT_INDEX_IP4TXMCOCTS ] = { 144 , 0 , 0 },
71+ [IRDMA_HW_STAT_INDEX_IP4TXMCPKTS ] = { 152 , 0 , 0 },
72+ [IRDMA_HW_STAT_INDEX_IP6TXOCTS ] = { 160 , 0 , 0 },
73+ [IRDMA_HW_STAT_INDEX_IP6TXPKTS ] = { 168 , 0 , 0 },
74+ [IRDMA_HW_STAT_INDEX_IP6TXFRAGS ] = { 176 , 0 , 0 },
75+ [IRDMA_HW_STAT_INDEX_IP6TXMCOCTS ] = { 184 , 0 , 0 },
76+ [IRDMA_HW_STAT_INDEX_IP6TXMCPKTS ] = { 192 , 0 , 0 },
77+ [IRDMA_HW_STAT_INDEX_IP4TXNOROUTE ] = { 200 , 0 , 0 },
78+ [IRDMA_HW_STAT_INDEX_IP6TXNOROUTE ] = { 208 , 0 , 0 },
79+ [IRDMA_HW_STAT_INDEX_TCPRTXSEG ] = { 216 , 0 , 0 },
80+ [IRDMA_HW_STAT_INDEX_TCPRXOPTERR ] = { 224 , 0 , 0 },
81+ [IRDMA_HW_STAT_INDEX_TCPRXPROTOERR ] = { 232 , 0 , 0 },
82+ [IRDMA_HW_STAT_INDEX_TCPTXSEG ] = { 240 , 0 , 0 },
83+ [IRDMA_HW_STAT_INDEX_TCPRXSEGS ] = { 248 , 0 , 0 },
84+ [IRDMA_HW_STAT_INDEX_UDPRXPKTS ] = { 256 , 0 , 0 },
85+ [IRDMA_HW_STAT_INDEX_UDPTXPKTS ] = { 264 , 0 , 0 },
86+ [IRDMA_HW_STAT_INDEX_RDMARXWRS ] = { 272 , 0 , 0 },
87+ [IRDMA_HW_STAT_INDEX_RDMARXRDS ] = { 280 , 0 , 0 },
88+ [IRDMA_HW_STAT_INDEX_RDMARXSNDS ] = { 288 , 0 , 0 },
89+ [IRDMA_HW_STAT_INDEX_RDMATXWRS ] = { 296 , 0 , 0 },
90+ [IRDMA_HW_STAT_INDEX_RDMATXRDS ] = { 304 , 0 , 0 },
91+ [IRDMA_HW_STAT_INDEX_RDMATXSNDS ] = { 312 , 0 , 0 },
92+ [IRDMA_HW_STAT_INDEX_RDMAVBND ] = { 320 , 0 , 0 },
93+ [IRDMA_HW_STAT_INDEX_RDMAVINV ] = { 328 , 0 , 0 },
94+ [IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS ] = { 336 , 0 , 0 },
95+ [IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED ] = { 344 , 0 , 0 },
96+ [IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED ] = { 352 , 0 , 0 },
97+ [IRDMA_HW_STAT_INDEX_TXNPCNPSENT ] = { 360 , 0 , 0 },
98+ [IRDMA_HW_STAT_INDEX_RNR_SENT ] = { 368 , 0 , 0 },
99+ [IRDMA_HW_STAT_INDEX_RNR_RCVD ] = { 376 , 0 , 0 },
100+ [IRDMA_HW_STAT_INDEX_RDMAORDLMTCNT ] = { 384 , 0 , 0 },
101+ [IRDMA_HW_STAT_INDEX_RDMAIRDLMTCNT ] = { 392 , 0 , 0 },
102+ [IRDMA_HW_STAT_INDEX_RDMARXATS ] = { 408 , 0 , 0 },
103+ [IRDMA_HW_STAT_INDEX_RDMATXATS ] = { 416 , 0 , 0 },
104+ [IRDMA_HW_STAT_INDEX_NAKSEQERR ] = { 424 , 0 , 0 },
105+ [IRDMA_HW_STAT_INDEX_NAKSEQERR_IMPLIED ] = { 432 , 0 , 0 },
106+ [IRDMA_HW_STAT_INDEX_RTO ] = { 440 , 0 , 0 },
107+ [IRDMA_HW_STAT_INDEX_RXOOOPKTS ] = { 448 , 0 , 0 },
108+ [IRDMA_HW_STAT_INDEX_ICRCERR ] = { 456 , 0 , 0 },
109+ };
110+
51111void ig3rdma_init_hw (struct irdma_sc_dev * dev )
52112{
53113 dev -> irq_ops = & ig3rdma_irq_ops ;
114+ dev -> hw_stats_map = ig3rdma_hw_stat_map ;
54115
55116 dev -> hw_attrs .uk_attrs .hw_rev = IRDMA_GEN_3 ;
56117 dev -> hw_attrs .uk_attrs .max_hw_wq_frags = IG3RDMA_MAX_WQ_FRAGMENT_COUNT ;
@@ -70,6 +131,8 @@ void ig3rdma_init_hw(struct irdma_sc_dev *dev)
70131 dev -> hw_attrs .page_size_cap = SZ_4K | SZ_2M | SZ_1G ;
71132 dev -> hw_attrs .max_hw_ird = IG3RDMA_MAX_IRD_SIZE ;
72133 dev -> hw_attrs .max_hw_ord = IG3RDMA_MAX_ORD_SIZE ;
134+ dev -> hw_attrs .max_stat_inst = IG3RDMA_MAX_STATS_COUNT ;
135+ dev -> hw_attrs .max_stat_idx = IRDMA_HW_STAT_INDEX_MAX_GEN_3 ;
73136 dev -> hw_attrs .uk_attrs .min_hw_wq_size = IG3RDMA_MIN_WQ_SIZE ;
74137 dev -> hw_attrs .uk_attrs .max_hw_srq_quanta = IRDMA_SRQ_MAX_QUANTA ;
75138 dev -> hw_attrs .uk_attrs .max_hw_inline = IG3RDMA_MAX_INLINE_DATA_SIZE ;
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