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drm/amd: Decrease message level for legacy-pm, kv-dpm and si-dpm
legacy-pm, kv-dpm and si-dpm have prints while changing power states that don't have a level and thus are printed by default. These are not useful at runtime for most people, so decrease them to debug. Reported-by: Alexandre Demers <alexandre.f.demers@gmail.com> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4322 Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://lore.kernel.org/r/20250627143432.3222843-1-superm1@kernel.org Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1 parent e7ac92c commit de5e9fe

4 files changed

Lines changed: 50 additions & 75 deletions

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‎drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c‎

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2886,16 +2886,18 @@ kv_dpm_print_power_state(void *handle, void *request_ps)
28862886
struct kv_ps *ps = kv_get_ps(rps);
28872887
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
28882888

2889-
amdgpu_dpm_print_class_info(rps->class, rps->class2);
2890-
amdgpu_dpm_print_cap_info(rps->caps);
2891-
printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
2889+
amdgpu_dpm_dbg_print_class_info(adev, rps->class, rps->class2);
2890+
amdgpu_dpm_dbg_print_cap_info(adev, rps->caps);
2891+
drm_dbg(adev_to_drm(adev), "vclk: %d, dclk: %d\n",
2892+
rps->vclk, rps->dclk);
28922893
for (i = 0; i < ps->num_levels; i++) {
28932894
struct kv_pl *pl = &ps->levels[i];
2894-
printk("\t\tpower level %d sclk: %u vddc: %u\n",
2895-
i, pl->sclk,
2896-
kv_convert_8bit_index_to_voltage(adev, pl->vddc_index));
2895+
drm_dbg(adev_to_drm(adev),
2896+
"power level %d sclk: %u vddc: %u\n",
2897+
i, pl->sclk,
2898+
kv_convert_8bit_index_to_voltage(adev, pl->vddc_index));
28972899
}
2898-
amdgpu_dpm_print_ps_status(adev, rps);
2900+
amdgpu_dpm_dbg_print_ps_status(adev, rps);
28992901
}
29002902

29012903
static void kv_dpm_fini(struct amdgpu_device *adev)

‎drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c‎

Lines changed: 33 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@
4747
#define amdgpu_dpm_check_state_equal(adev, cps, rps, equal) \
4848
((adev)->powerplay.pp_funcs->check_state_equal((adev)->powerplay.pp_handle, (cps), (rps), (equal)))
4949

50-
void amdgpu_dpm_print_class_info(u32 class, u32 class2)
50+
void amdgpu_dpm_dbg_print_class_info(struct amdgpu_device *adev, u32 class, u32 class2)
5151
{
5252
const char *s;
5353

@@ -66,71 +66,45 @@ void amdgpu_dpm_print_class_info(u32 class, u32 class2)
6666
s = "performance";
6767
break;
6868
}
69-
printk("\tui class: %s\n", s);
70-
printk("\tinternal class:");
69+
drm_dbg(adev_to_drm(adev), "\tui class: %s\n", s);
7170
if (((class & ~ATOM_PPLIB_CLASSIFICATION_UI_MASK) == 0) &&
7271
(class2 == 0))
73-
pr_cont(" none");
74-
else {
75-
if (class & ATOM_PPLIB_CLASSIFICATION_BOOT)
76-
pr_cont(" boot");
77-
if (class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
78-
pr_cont(" thermal");
79-
if (class & ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE)
80-
pr_cont(" limited_pwr");
81-
if (class & ATOM_PPLIB_CLASSIFICATION_REST)
82-
pr_cont(" rest");
83-
if (class & ATOM_PPLIB_CLASSIFICATION_FORCED)
84-
pr_cont(" forced");
85-
if (class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE)
86-
pr_cont(" 3d_perf");
87-
if (class & ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE)
88-
pr_cont(" ovrdrv");
89-
if (class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE)
90-
pr_cont(" uvd");
91-
if (class & ATOM_PPLIB_CLASSIFICATION_3DLOW)
92-
pr_cont(" 3d_low");
93-
if (class & ATOM_PPLIB_CLASSIFICATION_ACPI)
94-
pr_cont(" acpi");
95-
if (class & ATOM_PPLIB_CLASSIFICATION_HD2STATE)
96-
pr_cont(" uvd_hd2");
97-
if (class & ATOM_PPLIB_CLASSIFICATION_HDSTATE)
98-
pr_cont(" uvd_hd");
99-
if (class & ATOM_PPLIB_CLASSIFICATION_SDSTATE)
100-
pr_cont(" uvd_sd");
101-
if (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2)
102-
pr_cont(" limited_pwr2");
103-
if (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV)
104-
pr_cont(" ulv");
105-
if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC)
106-
pr_cont(" uvd_mvc");
107-
}
108-
pr_cont("\n");
72+
drm_dbg(adev_to_drm(adev), "\tinternal class: none\n");
73+
else
74+
drm_dbg(adev_to_drm(adev), "\tinternal class: %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
75+
(class & ATOM_PPLIB_CLASSIFICATION_BOOT) ? " boot" : "",
76+
(class & ATOM_PPLIB_CLASSIFICATION_THERMAL) ? " thermal" : "",
77+
(class & ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE) ? " limited_pwr" : "",
78+
(class & ATOM_PPLIB_CLASSIFICATION_REST) ? " rest" : "",
79+
(class & ATOM_PPLIB_CLASSIFICATION_FORCED) ? " forced" : "",
80+
(class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE) ? " 3d_perf" : "",
81+
(class & ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE) ? " ovrdrv" : "",
82+
(class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE) ? " uvd" : "",
83+
(class & ATOM_PPLIB_CLASSIFICATION_3DLOW) ? " 3d_low" : "",
84+
(class & ATOM_PPLIB_CLASSIFICATION_ACPI) ? " acpi" : "",
85+
(class & ATOM_PPLIB_CLASSIFICATION_HD2STATE) ? " uvd_hd2" : "",
86+
(class & ATOM_PPLIB_CLASSIFICATION_HDSTATE) ? " uvd_hd" : "",
87+
(class & ATOM_PPLIB_CLASSIFICATION_SDSTATE) ? " uvd_sd" : "",
88+
(class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2) ? " limited_pwr2" : "",
89+
(class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) ? " ulv" : "",
90+
(class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) ? " uvd_mvc" : "");
10991
}
11092

111-
void amdgpu_dpm_print_cap_info(u32 caps)
93+
void amdgpu_dpm_dbg_print_cap_info(struct amdgpu_device *adev, u32 caps)
11294
{
113-
printk("\tcaps:");
114-
if (caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY)
115-
pr_cont(" single_disp");
116-
if (caps & ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK)
117-
pr_cont(" video");
118-
if (caps & ATOM_PPLIB_DISALLOW_ON_DC)
119-
pr_cont(" no_dc");
120-
pr_cont("\n");
95+
drm_dbg(adev_to_drm(adev), "\tcaps: %s%s%s\n",
96+
(caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) ? " single_disp" : "",
97+
(caps & ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK) ? " video" : "",
98+
(caps & ATOM_PPLIB_DISALLOW_ON_DC) ? " no_dc" : "");
12199
}
122100

123-
void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev,
101+
void amdgpu_dpm_dbg_print_ps_status(struct amdgpu_device *adev,
124102
struct amdgpu_ps *rps)
125103
{
126-
printk("\tstatus:");
127-
if (rps == adev->pm.dpm.current_ps)
128-
pr_cont(" c");
129-
if (rps == adev->pm.dpm.requested_ps)
130-
pr_cont(" r");
131-
if (rps == adev->pm.dpm.boot_ps)
132-
pr_cont(" b");
133-
pr_cont("\n");
104+
drm_dbg(adev_to_drm(adev), "\tstatus:%s%s%s\n",
105+
rps == adev->pm.dpm.current_ps ? " c" : "",
106+
rps == adev->pm.dpm.requested_ps ? " r" : "",
107+
rps == adev->pm.dpm.boot_ps ? " b" : "");
134108
}
135109

136110
void amdgpu_pm_print_power_states(struct amdgpu_device *adev)
@@ -943,9 +917,9 @@ static int amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev)
943917
return -EINVAL;
944918

945919
if (amdgpu_dpm == 1 && pp_funcs->print_power_state) {
946-
printk("switching from power state:\n");
920+
drm_dbg(adev_to_drm(adev), "switching from power state\n");
947921
amdgpu_dpm_print_power_state(adev, adev->pm.dpm.current_ps);
948-
printk("switching to power state:\n");
922+
drm_dbg(adev_to_drm(adev), "switching to power state\n");
949923
amdgpu_dpm_print_power_state(adev, adev->pm.dpm.requested_ps);
950924
}
951925

‎drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.h‎

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -23,10 +23,9 @@
2323
#ifndef __LEGACY_DPM_H__
2424
#define __LEGACY_DPM_H__
2525

26-
void amdgpu_dpm_print_class_info(u32 class, u32 class2);
27-
void amdgpu_dpm_print_cap_info(u32 caps);
28-
void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev,
29-
struct amdgpu_ps *rps);
26+
void amdgpu_dpm_dbg_print_class_info(struct amdgpu_device *adev, u32 class, u32 class2);
27+
void amdgpu_dpm_dbg_print_cap_info(struct amdgpu_device *adev, u32 caps);
28+
void amdgpu_dpm_dbg_print_ps_status(struct amdgpu_device *adev, struct amdgpu_ps *rps);
3029
int amdgpu_get_platform_caps(struct amdgpu_device *adev);
3130
int amdgpu_parse_extended_power_table(struct amdgpu_device *adev);
3231
void amdgpu_free_extended_power_table(struct amdgpu_device *adev);

‎drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -7951,15 +7951,15 @@ static void si_dpm_print_power_state(void *handle,
79517951
struct rv7xx_pl *pl;
79527952
int i;
79537953

7954-
amdgpu_dpm_print_class_info(rps->class, rps->class2);
7955-
amdgpu_dpm_print_cap_info(rps->caps);
7956-
DRM_INFO("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
7954+
amdgpu_dpm_dbg_print_class_info(adev, rps->class, rps->class2);
7955+
amdgpu_dpm_dbg_print_cap_info(adev, rps->caps);
7956+
drm_dbg(adev_to_drm(adev), "\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
79577957
for (i = 0; i < ps->performance_level_count; i++) {
79587958
pl = &ps->performance_levels[i];
7959-
DRM_INFO("\t\tpower level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u\n",
7959+
drm_dbg(adev_to_drm(adev), "\t\tpower level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u\n",
79607960
i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1);
79617961
}
7962-
amdgpu_dpm_print_ps_status(adev, rps);
7962+
amdgpu_dpm_dbg_print_ps_status(adev, rps);
79637963
}
79647964

79657965
static int si_dpm_early_init(struct amdgpu_ip_block *ip_block)

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