Skip to content

Commit e0503d4

Browse files
HannahPeuckmannConchuOD
authored andcommitted
riscv: dts: starfive: visionfive 2: Remove non-existing I2S hardware
This partially reverts commit 92cfc35 ("riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1") This added device tree nodes for I2S hardware that is not actually on the VisionFive 2 board, but connected on the 40pin header. Many different extension boards could be added on those pins, so this should be handled by overlays instead. This also conflicts with the TDM node which also attempts to grab GPIO 44: starfive-jh7110-sys-pinctrl 13040000.pinctrl: pin GPIO44 already requested by 10090000.tdm; cannot claim for 120c0000.i2s Fixes: 92cfc35 ("riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1") Signed-off-by: Hannah Peuckmann <hannah.peuckmann@canonical.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Tested-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
1 parent dcde4e9 commit e0503d4

1 file changed

Lines changed: 0 additions & 58 deletions

File tree

arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi

Lines changed: 0 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -278,24 +278,6 @@
278278
status = "okay";
279279
};
280280

281-
&i2srx {
282-
pinctrl-names = "default";
283-
pinctrl-0 = <&i2srx_pins>;
284-
status = "okay";
285-
};
286-
287-
&i2stx0 {
288-
pinctrl-names = "default";
289-
pinctrl-0 = <&mclk_ext_pins>;
290-
status = "okay";
291-
};
292-
293-
&i2stx1 {
294-
pinctrl-names = "default";
295-
pinctrl-0 = <&i2stx1_pins>;
296-
status = "okay";
297-
};
298-
299281
&mmc0 {
300282
max-frequency = <100000000>;
301283
assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
@@ -446,46 +428,6 @@
446428
};
447429
};
448430

449-
i2srx_pins: i2srx-0 {
450-
clk-sd-pins {
451-
pinmux = <GPIOMUX(38, GPOUT_LOW,
452-
GPOEN_DISABLE,
453-
GPI_SYS_I2SRX_BCLK)>,
454-
<GPIOMUX(63, GPOUT_LOW,
455-
GPOEN_DISABLE,
456-
GPI_SYS_I2SRX_LRCK)>,
457-
<GPIOMUX(38, GPOUT_LOW,
458-
GPOEN_DISABLE,
459-
GPI_SYS_I2STX1_BCLK)>,
460-
<GPIOMUX(63, GPOUT_LOW,
461-
GPOEN_DISABLE,
462-
GPI_SYS_I2STX1_LRCK)>,
463-
<GPIOMUX(61, GPOUT_LOW,
464-
GPOEN_DISABLE,
465-
GPI_SYS_I2SRX_SDIN0)>;
466-
input-enable;
467-
};
468-
};
469-
470-
i2stx1_pins: i2stx1-0 {
471-
sd-pins {
472-
pinmux = <GPIOMUX(44, GPOUT_SYS_I2STX1_SDO0,
473-
GPOEN_ENABLE,
474-
GPI_NONE)>;
475-
bias-disable;
476-
input-disable;
477-
};
478-
};
479-
480-
mclk_ext_pins: mclk-ext-0 {
481-
mclk-ext-pins {
482-
pinmux = <GPIOMUX(4, GPOUT_LOW,
483-
GPOEN_DISABLE,
484-
GPI_SYS_MCLK_EXT)>;
485-
input-enable;
486-
};
487-
};
488-
489431
mmc0_pins: mmc0-0 {
490432
rst-pins {
491433
pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,

0 commit comments

Comments
 (0)