@@ -285,6 +285,17 @@ static const struct imx_rproc_att imx_rproc_att_imx6sx[] = {
285285 { 0x80000000 , 0x80000000 , 0x60000000 , 0 },
286286};
287287
288+ static int imx_rproc_mmio_start (struct rproc * rproc )
289+ {
290+ struct imx_rproc * priv = rproc -> priv ;
291+ const struct imx_rproc_dcfg * dcfg = priv -> dcfg ;
292+
293+ if (priv -> gpr )
294+ return regmap_clear_bits (priv -> gpr , dcfg -> gpr_reg , dcfg -> gpr_wait );
295+
296+ return regmap_update_bits (priv -> regmap , dcfg -> src_reg , dcfg -> src_mask , dcfg -> src_start );
297+ }
298+
288299static int imx_rproc_start (struct rproc * rproc )
289300{
290301 struct imx_rproc * priv = rproc -> priv ;
@@ -303,16 +314,6 @@ static int imx_rproc_start(struct rproc *rproc)
303314 }
304315
305316 switch (dcfg -> method ) {
306- case IMX_RPROC_MMIO :
307- if (priv -> gpr ) {
308- ret = regmap_clear_bits (priv -> gpr , dcfg -> gpr_reg ,
309- dcfg -> gpr_wait );
310- } else {
311- ret = regmap_update_bits (priv -> regmap , dcfg -> src_reg ,
312- dcfg -> src_mask ,
313- dcfg -> src_start );
314- }
315- break ;
316317 case IMX_RPROC_SMC :
317318 arm_smccc_smc (IMX_SIP_RPROC , IMX_SIP_RPROC_START , 0 , 0 , 0 , 0 , 0 , 0 , & res );
318319 ret = res .a0 ;
@@ -331,6 +332,23 @@ static int imx_rproc_start(struct rproc *rproc)
331332 return ret ;
332333}
333334
335+ static int imx_rproc_mmio_stop (struct rproc * rproc )
336+ {
337+ struct imx_rproc * priv = rproc -> priv ;
338+ const struct imx_rproc_dcfg * dcfg = priv -> dcfg ;
339+ int ret ;
340+
341+ if (priv -> gpr ) {
342+ ret = regmap_set_bits (priv -> gpr , dcfg -> gpr_reg , dcfg -> gpr_wait );
343+ if (ret ) {
344+ dev_err (priv -> dev , "Failed to quiescence M4 platform!\n" );
345+ return ret ;
346+ }
347+ }
348+
349+ return regmap_update_bits (priv -> regmap , dcfg -> src_reg , dcfg -> src_mask , dcfg -> src_stop );
350+ }
351+
334352static int imx_rproc_stop (struct rproc * rproc )
335353{
336354 struct imx_rproc * priv = rproc -> priv ;
@@ -345,20 +363,6 @@ static int imx_rproc_stop(struct rproc *rproc)
345363 }
346364
347365 switch (dcfg -> method ) {
348- case IMX_RPROC_MMIO :
349- if (priv -> gpr ) {
350- ret = regmap_set_bits (priv -> gpr , dcfg -> gpr_reg ,
351- dcfg -> gpr_wait );
352- if (ret ) {
353- dev_err (priv -> dev ,
354- "Failed to quiescence M4 platform!\n" );
355- return ret ;
356- }
357- }
358-
359- ret = regmap_update_bits (priv -> regmap , dcfg -> src_reg , dcfg -> src_mask ,
360- dcfg -> src_stop );
361- break ;
362366 case IMX_RPROC_SMC :
363367 arm_smccc_smc (IMX_SIP_RPROC , IMX_SIP_RPROC_STOP , 0 , 0 , 0 , 0 , 0 , 0 , & res );
364368 ret = res .a0 ;
@@ -855,15 +859,60 @@ static int imx_rproc_attach_pd(struct imx_rproc *priv)
855859 return 0 ;
856860}
857861
858- static int imx_rproc_detect_mode (struct imx_rproc * priv )
862+ static int imx_rproc_mmio_detect_mode (struct rproc * rproc )
859863{
860- struct regmap_config config = { .name = "imx-rproc" };
864+ const struct regmap_config config = { .name = "imx-rproc" };
865+ struct imx_rproc * priv = rproc -> priv ;
861866 const struct imx_rproc_dcfg * dcfg = priv -> dcfg ;
862867 struct device * dev = priv -> dev ;
863868 struct regmap * regmap ;
869+ u32 val ;
870+ int ret ;
871+
872+ priv -> gpr = syscon_regmap_lookup_by_phandle (dev -> of_node , "fsl,iomuxc-gpr" );
873+ if (IS_ERR (priv -> gpr ))
874+ priv -> gpr = NULL ;
875+
876+ regmap = syscon_regmap_lookup_by_phandle (dev -> of_node , "syscon" );
877+ if (IS_ERR (regmap )) {
878+ dev_err (dev , "failed to find syscon\n" );
879+ return PTR_ERR (regmap );
880+ }
881+
882+ priv -> regmap = regmap ;
883+ regmap_attach_dev (dev , regmap , & config );
884+
885+ if (priv -> gpr ) {
886+ ret = regmap_read (priv -> gpr , dcfg -> gpr_reg , & val );
887+ if (val & dcfg -> gpr_wait ) {
888+ /*
889+ * After cold boot, the CM indicates its in wait
890+ * state, but not fully powered off. Power it off
891+ * fully so firmware can be loaded into it.
892+ */
893+ imx_rproc_stop (priv -> rproc );
894+ return 0 ;
895+ }
896+ }
897+
898+ ret = regmap_read (regmap , dcfg -> src_reg , & val );
899+ if (ret ) {
900+ dev_err (dev , "Failed to read src\n" );
901+ return ret ;
902+ }
903+
904+ if ((val & dcfg -> src_mask ) != dcfg -> src_stop )
905+ priv -> rproc -> state = RPROC_DETACHED ;
906+
907+ return 0 ;
908+ }
909+
910+ static int imx_rproc_detect_mode (struct imx_rproc * priv )
911+ {
912+ const struct imx_rproc_dcfg * dcfg = priv -> dcfg ;
913+ struct device * dev = priv -> dev ;
864914 struct arm_smccc_res res ;
865915 int ret ;
866- u32 val ;
867916 u8 pt ;
868917
869918 if (dcfg -> ops && dcfg -> ops -> detect_mode )
@@ -937,41 +986,6 @@ static int imx_rproc_detect_mode(struct imx_rproc *priv)
937986 break ;
938987 }
939988
940- priv -> gpr = syscon_regmap_lookup_by_phandle (dev -> of_node , "fsl,iomuxc-gpr" );
941- if (IS_ERR (priv -> gpr ))
942- priv -> gpr = NULL ;
943-
944- regmap = syscon_regmap_lookup_by_phandle (dev -> of_node , "syscon" );
945- if (IS_ERR (regmap )) {
946- dev_err (dev , "failed to find syscon\n" );
947- return PTR_ERR (regmap );
948- }
949-
950- priv -> regmap = regmap ;
951- regmap_attach_dev (dev , regmap , & config );
952-
953- if (priv -> gpr ) {
954- ret = regmap_read (priv -> gpr , dcfg -> gpr_reg , & val );
955- if (val & dcfg -> gpr_wait ) {
956- /*
957- * After cold boot, the CM indicates its in wait
958- * state, but not fully powered off. Power it off
959- * fully so firmware can be loaded into it.
960- */
961- imx_rproc_stop (priv -> rproc );
962- return 0 ;
963- }
964- }
965-
966- ret = regmap_read (regmap , dcfg -> src_reg , & val );
967- if (ret ) {
968- dev_err (dev , "Failed to read src\n" );
969- return ret ;
970- }
971-
972- if ((val & dcfg -> src_mask ) != dcfg -> src_stop )
973- priv -> rproc -> state = RPROC_DETACHED ;
974-
975989 return 0 ;
976990}
977991
@@ -1143,6 +1157,12 @@ static void imx_rproc_remove(struct platform_device *pdev)
11431157 destroy_workqueue (priv -> workqueue );
11441158}
11451159
1160+ static const struct imx_rproc_plat_ops imx_rproc_ops_mmio = {
1161+ .start = imx_rproc_mmio_start ,
1162+ .stop = imx_rproc_mmio_stop ,
1163+ .detect_mode = imx_rproc_mmio_detect_mode ,
1164+ };
1165+
11461166static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn_mmio = {
11471167 .src_reg = IMX7D_SRC_SCR ,
11481168 .src_mask = IMX7D_M4_RST_MASK ,
@@ -1153,6 +1173,7 @@ static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn_mmio = {
11531173 .att = imx_rproc_att_imx8mn ,
11541174 .att_size = ARRAY_SIZE (imx_rproc_att_imx8mn ),
11551175 .method = IMX_RPROC_MMIO ,
1176+ .ops = & imx_rproc_ops_mmio ,
11561177};
11571178
11581179static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = {
@@ -1169,6 +1190,7 @@ static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = {
11691190 .att = imx_rproc_att_imx8mq ,
11701191 .att_size = ARRAY_SIZE (imx_rproc_att_imx8mq ),
11711192 .method = IMX_RPROC_MMIO ,
1193+ .ops = & imx_rproc_ops_mmio ,
11721194};
11731195
11741196static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qm = {
@@ -1204,6 +1226,7 @@ static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = {
12041226 .att = imx_rproc_att_imx7d ,
12051227 .att_size = ARRAY_SIZE (imx_rproc_att_imx7d ),
12061228 .method = IMX_RPROC_MMIO ,
1229+ .ops = & imx_rproc_ops_mmio ,
12071230};
12081231
12091232static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = {
@@ -1214,6 +1237,7 @@ static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = {
12141237 .att = imx_rproc_att_imx6sx ,
12151238 .att_size = ARRAY_SIZE (imx_rproc_att_imx6sx ),
12161239 .method = IMX_RPROC_MMIO ,
1240+ .ops = & imx_rproc_ops_mmio ,
12171241};
12181242
12191243static const struct imx_rproc_dcfg imx_rproc_cfg_imx93 = {
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